Papers by Author: Shingo Miyagawa

Abstract: The I-V characteristics of p+n 4H-SiC diode formed by Al ion implantation have been investigated as a function of annealing temperature. Al ions are implanted at the elevated sample temperature of 500 oC in order to fabricate p-type doped layer on the n-type epitaxial layer, grown on n+ 4H-SiC substrate. The implanted sample is annealed using electron bombardment annealing system in the annealing temperature ranging from 1700 to 1900 oC. The Al implanted sample, annealed below 1800 oC shows the deteriorated I-V characteristics in which the forward current includes the resistive current components and the reverse current is in the order of 10-4 A/cm2. The p+n diode formed by annealing at 1900 oC reveals the forward current without extra-current components and the reverse current as low as 10-6 A/cm2. It is suggested that the annealing above 1900 oC is effective in reducing the implantation-induced defect at the interface between Al implanted p+ layer and the underlying n-type epitaxial layer.

Abstract: We fabricate pn-junction diode on p-type 4H-SiC(0001), in which n-type region is formed by N ion implantation at room temperature (total dose: 2.4 x 1015 /cm2, thickness: 300 nm) and subsequently annealed for 5 min using electron bombardment annealing system (EBAS). The root-mean-square (RMS) surface roughness and sheet resistance (Rs) for N ion implanted region, annealed at 1900 oC is estimated to be 0.7 nm and 940 4/sq., respectively. The alloyed Ni ohmic contact to N ion implanted layer, annealed at 1900 oC, shows the contact resistance (Rc) of 8.3 x 10-5 4cm2. The forward drop voltage at 100 A/cm2 and on-resistance of mesa-type pn junction diode is estimated to be 3.1 V and 1.3x10-2 4cm2. The reverse bias leakage current of that is 2.2 x 10-5 A/cm2 at 100 V. It is demonstrated that EBAS is able to apply for the fabrication of pn-junction diode.

Abstract: The encapsulating annealing of N+ implanted 4H-SiC(0001) is performed using diamondlike- carbon (DLC) films for the suppression of surface roughening. 4H-SiC(0001) sample with an off-orientation of 8o is multiply implanted by N+ with energy ranging from 15 to 120 keV at a total dose of 2.4×1015 cm-2 at room temperature. DLC films with thickness ranging from 0.3 to 1.8 μm are deposited on the surface of implanted sample using plasma-based ion implantation equipment with C2H4 gas. The DLC capped sample is annealed at 1500 oC for 5 min using IR image annealer. After annealing, DLC film is removed by the oxidization. The sample capped by DLC film with a thickness of 0.3 μm shows the root mean square (RMS) surface roughness of 0.6 nm while the annealed sample without DLC film shows RMS surface roughness of 5.2 nm. As the thickness of DLC film is increased from 0.3 to 1.8 μm, the RMS surface roughness is decreased from 0.6 to 0.2 nm.