Papers by Author: Tsunenobu Kimoto

Abstract: Silicon carbide (SiC) n-and p-channel junction field effect transistors (JFETs) with vertical channels were fabricated by direct ion implantation into a high-purity semi-insulating 4H-SiC substrate in order to further develop the path towards complementary JFET integrated circuits for applications in harsh environments. Compared with the conventional structure (lateral channel), the proposed structure is suitable for integration and inherently has a high transconductance owing to the double-gate configuration. The threshold voltage (V_th) can be controlled by mask design, while V_th in the conventional structure is solely determined by the ion implantation conditions. We demonstrate the transistor operation of the vertical-channel n-and p-channel JFETs fully fabricated by ion implantation.

Abstract: Effects of a parasitic region in SiC BJTs on conductivity modulation and a forced current gain (β_F) were investigated by using TCAD simulation with various device structures. By introducing an Al⁺-implanted region below the base parasitic region, β_F can be improved because the implanted region can reduce the base spreading resistance, leading to alleviation of debiasing effect. β_F in devices with various parasitic areas, whose base spreading resistances were reduced by the Al⁺-implantation, were compared. We found that β_F can be enhanced by expanding the parasitic area if the base spreading resistance is sufficiently reduced. The higher β_F is attributed to an expanded conductivity-modulated region. The collector current spreading in the collector layer and the hole injection from the parasitic region as well as from the intrinsic region can play a role to evoke the conductivity modulation. Thus, the larger parasitic region can expand the conductivity-modulated region, resulting in expansion of an active area and the enhancement of β_F.

Abstract: Application of highly N-doped buffer layers or a (N+B)-doped buffer layer to PiN diodes to suppress the expansion of Shockley stacking faults (SSFs) from the epilayer/substrate interface was studied. These buffer layers showed very short minority carrier lifetimes of 30–200 ns at 250°C. The PiN diodes were fabricated with buffer layers of various thicknesses and were then tested under high current injection conditions of 600A/cm². The thicker buffer layers with shorter minority carrier lifetimes demonstrated the suppression of SSFs expansion and thus that of diode degradation.

Abstract: We evaluated the effect of NO annealing on hole trapping characteristic of SiC metal-oxide-semiconductor (MOS) capacitor by measuring flatband voltage (V_FB) shifts during a constant negative gate voltage stress under UV illumination. Under low stress voltages, the V_FB shift due to hole trapping was found to be suppressed by NO annealing. However, the V_FB shift of the NO-annealed device increases significantly with stress time under high stress voltage conditions, while the device without NO annealing showed only a slight shift. This result implies that NO annealing enhances generation of hole traps, leading to the degradation of SiC-MOS devices in long-term reliability.

Abstract: We studied the hydrogen passivation/depassivation of four types of intrinsic defects (EI5/6, HEI7/8, HEI9/10, and P6/7) in p-type and semi-insulating 4H-SiC by means of electron spin resonance (ESR) for examining the origin of career-lifetime-killing defects. We suggest that the HEI7/8 and P6/7 centers are the strongest candidate for the origin of the lifetime-killing defects.

Abstract: We fabricated electrostatically-excited single-crystalline 4H-SiC microcantilever resonators with various thicknesses and lengths. Their resonant characteristics were investigated from room temperature (RT) up to 600°C. The resonant frequency of the cantilevers decreased with increasing temperature. From the results, the temperature dependence of Young’s modulus of single-crystalline 4H-SiC was obtained, i.e., 3% decrement with increasing temperature from RT to 600°C. The cantilevers with different thicknesses showed different temperature dependences of the quality factor. A 2-μm-thick cantilever exhibited a high quality factor (Q) (250,000) at RT and the Q decreased to 6,000 at 600°C, which can be explained by thermoelastic damping. On the other hand, a Q of a 0.45-μm-thick cantilever was still high (50,000) even at 600°C.

Abstract: It was discovered that the oxidation rate for SiC depended on the conduction type. The oxidation was performed for SiC(0001) with nitrogen doping (n-type) in the range from 2×10¹⁶ cm^-3 to 1×10¹⁹ cm^-3, and aluminum doping (p-type) in the range from 2×10¹⁵ cm^-3 to 1×10¹⁹ cm^-3, exhibiting a clear dependence. For n-type SiC the oxide thickness increases for higher doping density, and for p-type the thickness decreases. Note that in the case of Si oxidation, there exists very little difference of oxidation rate between the conduction types in such low doping density, and the dependence is peculiar to SiC.

Abstract: We measured Fourier transform infrared (FT-IR) and cathodoluminescence (CL) spectra of SiO₂ films with various thicknesses, grown on 4H-SiC substrates. The appearance of broad phonon modes at ~1150–1250 cm^-1 in p-polarized light and their disappearance in s-polarized light confirmed that the phonon modes at ~1150–1250 cm^-1 originated from surface polaritons (SPPs). For the thin SiO₂ film (8-nm thick), the peak frequency of the transverse optical (TO) phonon in the SiO₂ film on the 4H-SiC substrate was observed at ~1080 cm^-1 and was higher than that in SiO₂ films on the Si substrate (1074 cm^-1). This suggested that the thin SiO₂ film (8-nm thick) is under compressive stresses at the interface between the SiO₂ film and SiC substrate. On the other hand, for the thick SiO₂ films (85 and 130-nm thick), the TO phonon peak frequency tended to shift toward lower frequencies with increasing oxide layer thickness. The CL measurement indicated that the CL peak intensity at ~640 nm, attributed to non-bridging oxidation hole centers (NBOHCs), became stronger with increasing oxide layer thickness, relative to that of the CL peaks at ~460 and 490 nm due to oxygen vacancy centers (OVCs). By comparing the FT-IR and CL measurements, we concluded that the TO phonon red-shift with increasing oxide layer thickness can mainly be attributed to an increase in inhomogeneity with increasing oxide layer thickness for the thick SiO₂ films.

Abstract: This work reports on description and application of a new Photoluminescence (PL) Imaging technique for in-grown stacking fault (SF) characterization and identification on 4H-SiC epilayers. The purpose of this technique is to make a spectroscopic picture from a collection of PL imaging picture taken at different output wavelengths in order to both display the shape and an approximation of the maximum PL intensity wavelength at room temperature (RT) of the characterized SF. This is why we called this technique “PL Imaging Spectroscopy”. Five types of SFs have been observed and compared to PL spectra collected at RT and 10K.

Abstract: We fabricated electrostatically actuated single-crystalline 4H-SiC microcantilever resonators. To realize a narrow gap between cantilevers and substrate, we etched a thin p-type SiC layer in n/p/n multilayer structure by doping-selective electrochemical etching. The resonant characteristics of the fabricated 4H-SiC microcantilevers were investigated under a vacuum condition. Electrostatic actuation of microcantilevers was successfully performed by applying 10 mV_rms ac voltage with 20 mV dc bias. The quality factor of 4H-SiC microcantilevers was above 100,000, which is about ten times higher than the quality factor of Si cantilevers with the same structure. Resonant characteristics were almost identical for mechanical actuation and electrostatic actuation.