Papers by Keyword: 4H-SiC

Abstract: This study investigates the influence of active cell geometry on the static performance of 10-kV 4H-Silicon Carbide (SiC) Junction Barrier Schottky (JBS) diodes. Two types of diodes were fabricated and characterized, one with a hexagonal cell and the other with a stripe cell. While forward conduction characteristics were comparable, the reverse leakage current of the hexagonal cell was more than two orders of magnitude lower than that of the stripe cell at 8 kV. 3D TCAD simulations revealed that this discrepancy stems from strong electric field concentrations both at the bottom corners of the P⁺ junctions and at the center of the Schottky contact in the stripe structure. These localized fields reduce the Schottky barrier height and enhance electron injection. In contrast, the hexagonal cell exhibited a more uniform electric field distribution in both regions, effectively suppressing leakage current. These findings underscore the critical role of active cell geometry in achieving robust reverse blocking performance in ultra-high-voltage SiC JBS diodes by clarifying the physical mechanisms contributing to leakage current behavior.

Abstract: Visible light emission was observed for negative-bias gate stress of n-channel power MOSFETs in 4H-SiC. The emission intensity is approximately proportional to the current through the gate oxide; and its pattern follows the configuration of active MOSFET channels. We relate the emission to recombination of the electrons injected from the gate into the oxide with valence-band holes from SiC at the surface states at the SiC-to-oxide interface. The gate leakage imaging technique may be helpful for locating different types of gate oxide current crowding, which crowding might cause enhanced wear-out of the gates and early device failure.

Abstract: Point defects in 4H silicon carbide (4H-SiC), such as the silicon vacancy, also known as color centers, offer considerable potential for quantum applications in the fields of quantum sensing as well as computing and communication. The latter two necessitate indistinguishable photons for entanglement swapping and consequently demand precise control over the electronic transition energies, i.e. emission and absorption wavelengths of color centers. One way to achieve this is through monolithic integration of electronic devices in combination with integrated photonics in 4H-SiC. This is considered a potential pathway for scalable quantum photonic integrated circuits. In this paper, we investigate the suitability of a signal-ground-modulator and a vertical pin diode in combination with a waveguide to (i) achieve local field strengths of 5 to 20 MV/m in the crystal’s c-direction, (ii) stabilize the charge state of the silicon vacancy by controlling the local Fermi level, (iii) meet the requirements for photonic single-mode operation, and (iv) minimize the absorption of the evanescent wave due to metal contacts. The findings of the electronic and optical simulations conducted with Synopsys Sentaurus and Ansys Lumerical suggest that the signal-ground-modulator, commonly used in integrated photonics, rarely attains the requisite field strength. In contrast, the vertical pin diode has the potential to meet these requirements even at reduced bias voltages. Furthermore, the intrinsic layer of the diode offers a wide region in which to host the color center in its optically active, negatively charged state.

Abstract: Cumulative heavy-ion irradiation effects were investigated in a commercial 4H-SiC double trench MOSFET through a combination of cyclotron experiments and TCAD simulations. Devices were exposed to continuous ¹²⁴Xe³⁵⁺ ion strikes at a linear energy transfer (LET) of 63 MeV·cm²/mg under drain biases from 100 to 400 V. Experimental results revealed the onset of permanent drain and gate leakage at voltages as low as 200 V, with degradation rates increasing by several orders of magnitude at higher bias. Post-irradiation measurements confirmed trench oxide rupture and source leakage path formation, establishing single-event leakage current (SELC) as the dominant degradation mechanism. In contrast, TCAD simulations of isolated ion strikes predicted catastrophic single-event burnout (SEB) only at or above 250–300 V, highlighting the critical role of cumulative damage processes that are not captured in single-strike models. These findings demonstrate that permanent leakage-driven degradation effectively extends the SELC zone beyond conventional SEB thresholds, reducing the safe operating area of trench-based SiC MOSFETs. The results have significant implications for derating strategies in space applications, where current SEB-focused guidelines may underestimate vulnerability, and highlight the need for radiation-hardening by device design to ensure long-term reliability.

Abstract: Accurate characterization of low-resistance ohmic contacts on 4H-SiC is crucial for devicedevelopment, but is complicated by the limitations of the standard Transfer Length Method (TLM).TLM test structures are widely used for extracting the specific contact resistivity (ρC) between metaland semiconductor layers, as well as the sheet resistance of doped layers. The contact formation pro-cess itself, particularly the annealing step, modifies the SiC layer under the contact. This results in asheet resistance below the contact (RSK) that deviates from the sheet resistance of interest between thecontacts (RSH), which invalidates a key assumption of the standard TLM evaluation of a constant RSHthroughout the whole TLM test structure. This study uses 2D TCAD simulation of TLM test structuresto investigate the influence of the contact length L, while using an advanced evaluation method forextracting ρC with the help of a third contact. Consequently, it is necessary to measure the contactend resistance RCE, which is derived from the potential at the end of the TLM contact. The findingsprovide a deeper understanding of the TLM technique’s robustness and offer valuable guidelines foroptimizing TLM test structures to ensure accurate characterization of ohmic contacts on 4H-SiC.

Abstract: Laser annealing is considered an enabling process for a new generation of SiC power devices, since it allows the formation of ohmic contacts on very thin wafers, significantly reducing their total ON resistance. Ni silicide and Ti silicide ohmic contacts have been widely investigated and reported in literature, exploring in detail the role of laser features, metal thickness and thinning process. Nevertheless, adding a small amount of Si to the contact layer could represent an opportunity to increase process options. In this work, a NiSi alloy has been used as a contact metal to study the role of the addition of Si to Ni in the reaction process under UV laser irradiation. Morphological and structural properties of the reacted layers have been investigated by means of Transmission Electron Microscopy (TEM) and X-Ray Diffraction (XRD) analyses. The electrical characterization of reacted contacts has been performed by measuring their Sheet Resistance (R_s) by Four Point Probe (FPP) method and, at device level, by measuring the forward voltage drop (V_f) of Schottky Barrier Diodes (SBDs) fabricated on 150 mm-diameter 4H-SiC wafers. Furthermore, a comparison has been made between Ni and NiSi alloy under the same irradiation conditions. It has been found that adding Si to Ni in the contact metal layer moves the silicide reaction forward, driving the strong relationship observed between structural, morphological and electrical properties of the reacted contacts.

Abstract: 3C-SiC with a moderate band gap and a large electron affinity is expected to have superior long-term stability against performance degradation. We have fabricated Al-gate MOS diodes in 3C-on-4H-SiC and 4H-SiC regions on a simultaneous lateral epitaxy (SLE) wafer. Here, evaluation results of their high-frequency differential capacitance-voltage (C-V) characteristics are reported and, from suggested band diagrams, carrier transport involved in the phenomena are considered. In the case of n^--type 3C-on-4H-SiC MOS diode, increase in capacitance due to fast modulation in the inversion layer charge (hole) concentration can be confirmed in the negative bias below-5 V. 2-dimensional hole gas (2DHG) is considered at the Si-face 3C/4H heterointerface negatively charged by spontaneous polarization and is expected to be an effective supply source of holes. Especially in the case of p-type 3C-on-4H-SiC MOS diode, it is considered that injection of holes from neutral p-type region into the heterointerface induces compensation of the fixed charges and lowering of the electron barrier at conduction band, and then, electron injection through the barrier causes the fast response of inversion-layer modulation. Appearance of the larger frequency dependence can be understood by inclusion of the larger-activation-energy phenomena, such as “a deep acceptor level” and “2DHG confined by fixed charges”. These findings are believed to contribute to building new production platforms of high-performance power semiconductor devices utilizing the polytype heterostructure of SiC.

Abstract: This work proposes a linear, area‑based component separation method to extract an effective trench sidewall capacitance from C-V measurements of 4H‑SiC UMOS capacitors. Devices were fabricated with two gate‑oxide schemes LPCVD TEOS and low‑temperature oxidation of LPCVD polysilicon and characterized by I-V and C-V measurements. Planar capacitors show breakdown strength above 9 MV/cm. Least‑squares decomposition of layout‑dependent capacitances enabled the separation of mesa, sidewall and bottom contributions. Additionally, this applying this approach revealed trench-pitch dependent depletion and larger wafer‑level thickness variation for the polysilicon‑oxidation flow. Reconstruction errors up to 20 % indicate that spacing‑dependent depletion, corner curvature, fringe and field‑oxide capacitances exceed the simple parallel‑capacitor model.

Abstract: This paper presents process integration of atomic layer deposition (ALD) SiO₂ as gate dielectric in the 1.7 kV SiC trench UMOSFET. This integration provides a solution for embedding complementary metal oxide semiconductor (CMOS) circuits into the UMOSFET power device, enabling the realization of smart power management integrated circuit (IC) functions in the future. 4H-SiC power MOSFETs have gained increased attention in medium to high power applications recently due to their wide bandgap, high breakdown electric field, and excellent thermal conductivity. The electric vehicle (EV) is one example of an application where the Tesla Model 3 utilizes SiC 650V VDMOSFETs as driving components in its inverter design. Trench MOSFETs are key to achieving these requirements to further scale down power devices while decreasing the specific on-state resistance (R_on,sp). This is challenging with thermal gate oxide on SiC trench MOSFETs due to the anisotropic thermal oxide growth rate on the sidewalls and the bottom of trench or mesa region. Therefore, we propose a novel fabrication process by integrating ALD SiO₂ gate oxide into trench UMOSFET. The R_on,sp of the fabricated device can be reduced to 2.3mΩ-cm², accompanied by a very low density of interface states (D_it) of approximately 5.36x10¹⁰ eV^-1cm^-2. Another feature of this ALD SiO₂ solution for gate oxide is the monolithic integration of the CMOS circuit with the UMOSFET, enabling the realization of smart power IC management.

Abstract: This paper reports on the comparative analysis of several 6.5 kV-rated 4H-SiC Junction Barrier Schottky integrated MOSFETs (JBSFETs) and 4H-SiC MOSFET to assess their forward conduction, 3^rd quadrant behavior, and blocking characteristics. Among different JBSFET architectures, the Island P+ JBSFET achieved nearly identical specific on-resistance (R_on,sp) to the nominal MOSFET while delivering superior 3^rd quadrant conduction and maintaining a high breakdown voltage. Further optimization of Schottky width demonstrated a trade-off between leakage suppression and 3^rd quadrant conduction efficiency that underscores the Island P+ JBSFET’s potential as a reliable high-voltage SiC power device for next-generation applications.