Papers by Keyword: 4H-SiC

Abstract: We have demonstrated an integrated 3.3 kV 4H-SiC vertical planar bidirectional (BD) conventional (Conv) power DMOSFET in common-drain (CD) configuration using two commercially available power DMOSFET dies and study its operation down to 77 K (-196 °C) to evaluate its cryogenic static and switching performance. The BD conduction and blocking are achieved down to 77 K. The measured specific on-resistance (R_ON,sp) of the BD MOSFET at room temperature (RT) is 26 mΩ-cm², approximately twice that of the unidirectional device. It increases by 54% when cooled to 77 K due to a substantial increase in channel and possibly JFET on-resistance components. In addition, the extracted specific switching losses (E_ON,sp and E_OFF,sp) increases by 33% (13%) at 195K (–77 °C) and by 83% (88%) at 77 K, relative to their RT values. These increases are primarily attributed to the substantial rise in R_ON,sp at 77 K. As a result, the implemented BD Conv DMOSFET exhibits degradation in both on-state and switching performance under cryogenic operation, driven mainly by the significant increase in channel and JFET resistance components.

Abstract: Several 1.2kV 4H-SiC Bi-Directional MOSFETs (BiD-MOS) design approaches were successfully fabricated and evaluated based on their electrical characteristics. Both monolithic integration design approaches exhibited negligible differences in conduction, blocking, and switching characteristics when compared to their 2-Chip counterpart. However, during the short-circuit withstand time testing, severe gate oscillations were observed in the 2-Chip design, which was not an issue present in either monolithic configuration. As a result of its robust electrical behavior, monolithic integration emerges as a promising design approach for developing efficient and reliable Bi-Directional Switches.

Abstract: Silicon carbide (SiC) Schottky barrier diodes (SBDs) have become critical components in power electronics due to their excellent high-voltage, high-temperature tolerance, and fast switching capability. However, increasing device area to improve current-carrying capability increases the total number of defects, which leads to an increase in reverse leakage current and reduces wafer yield. To improve current distribution uniformity within SiC module packaging, reduce system size and weight, and enhance the current-carrying capacity and high-temperature stability of a single SBD, this paper develops 750V/100A and 1200V/100A SiC SBDs on 6-inch wafers. For the 750V/100A device, the corresponding forward voltage (V_F) at forward current (I_F) of 100 A is 1.68 V. For the 1200V/100A device, the corresponding V_F is 1.75V. Calculation based on the current voltage characteristics shows that the ideal factors of 750V/100A and 1200V/100A devices are 1.01 and 1.04, respectively, which are very close to 1. It demonstrates excellent Schottky contact and a high-quality interface. The devices exhibit high-temperature stability, meeting the demands of high-temperature applications.

Abstract: This paper presents the fabrication and characterization of a cell-to-cell integrated SiC lateral bi-directional MOSFET (L-BiD-MOSFET), with blocking performance analyzed through correlation of experimental results and 3D TCAD simulations. The fabricated devices exhibit a breakdown voltage of 600 V, notably lower than the 900 V predicted by 2D simulations. To address this discrepancy, 3D TCAD simulations were performed, which identified electric field crowding at the finger edges as the dominant factor limiting the breakdown voltage. To mitigate this effect, an extended P-top edge design was introduced, which increases the simulated breakdown voltage by more than 10%. Experimental results on devices incorporating the proposed design confirm improved breakdown capability, demonstrating good agreement with simulations. These results highlight the importance of accurate 3D simulation for edge effects in lateral structures. Overall, the proposed design strategy provides valuable guidance for the development of high-performance lateral bi-directional SiC power devices.

Abstract: This study presents the design, fabrication, and electrical characterization of 4H-SiC PIN diodes employed to provide a high electric field able to induce Stark effect in ⁷Be atoms implanted in the space charge region. Indeed, a variation in the half-life of the ⁷Be radioactive decay is expected to be achieved by applying an electric field of the order of 10⁶ V/cm, which can be produced by reverse-biasing 4H-SiC diodes close to the breakdown voltage. A set of diodes of area ranging between 2.12×10^-3 cm² and 9.88×10³ cm² was designed and fabricated to reach breakdown voltages up to 1000 V. When tested under reverse current limitation set equal to 300 nA, over 50% out of 24 devices could withstand reverse bias exceeding 800 V. This work reports on the characteristics of one diode of 9.88×10³ cm² area, implanted with ⁷Be and subject to continuous reverse-bias at 750 V for 107 days. Electrical characterization conducted before, during, and after long-term polarization highlighted an increase in the reverse current generation due to implantation-related defects, which however does not affect the breakdown voltage. These considerations lead to the conclusion that the electric field acting on the implanted ⁷Be remains stable over time, confirming the suitability of 4H-SiC diodes for both induction and measurement of ⁷Be lifetime variations.

Abstract: Seed crystal stabilization during the initial stage of 200-mm 4H-SiC crystal growth is critical for achieving high-quality wafers with large diameters. This study investigated the effects of heating ramp rates (0 - 6 °C/min) and SiC source powder porosity through both simulation and experimental approaches. Low ramp rates resulted in surface degradation of the seed crystal, whereas high ramp rates induced significant thermal stress, leading to cracking. Optimal ramp rates of 3 - 5 °C/min significantly minimized damage caused by seed crystal loss. Furthermore, high-porosity source powder facilitated adequate gas transport channels, thereby enhancing seed crystal stability. Crystals grown under these optimized conditions demonstrated improved edge morphology, absence of polycrystalline inclusions, and low dislocation densities, with threading screw dislocations (TSD) below 500 cm^-2 and basal plane dislocations (BPD) below 1,000 cm^-2. These results demonstrate that precise control of thermal parameters and source powder porosity offers an effective strategy for stable seed attachment and reproducible growth of high-quality, large-diameter SiC single crystals.

Abstract: We have investigated the applicability of a new type of 3C-SiC powder source material during PVT growth which consist of a particle size of ca. 10 µm (aggregates up to ca. 150 µm). In-situ X-ray visualization of 75 mm and 100 mm PVT growth runs showed a smooth SiC powder consumption during growth. Using Raman spectroscopy, we have found a high 4H-SiC polytype stability and a low residual stress distribution in the intentionally n-type doped grown crystals.

Abstract: Close Space PVT (CS-PVT) is a modification of standard PVT exhibiting a short source-to-seed-distance and enabling a large variety of growth process variations to meet the specific requirements of the SiC material (i.e. special polytype and/or doping) to be grown. In this work, we study the growth of 4H-SiC p-i-n structures exhibiting thick SiC layers to be used as SiC photovoltaic cells for remote power transfer in space. Nevertheless, the found results are also applicable (i) to the SiC thick layer growth of power electronic devices and (ii) SiC pucks with a thickness of up to 10mm. In addition, we present the new type of growth machine TableTopCS^TM in its design being dedicated for the special crucible configuration of CS-PVT.

Abstract: 4H-SiC is a wide-bandgap semiconductor that has become essential for power electronics due to its large bandgap, high critical electric field, and excellent thermal stability. Within the {0001} basal orientation, the two polar surfaces – Si-face and C-face – exhibit distinct behaviours during chemical vapor deposition (CVD) homoepitaxy, with direct implications for device performance and manufacturing. In this work, n-type epitaxial layers were deposited on 150 mm, 4° off-axis Si-face and C-face substrates under identical conditions in a single-wafer hot-wall LP-CVD reactor (T > 1600 °C, P = 3.0 kPa, C/Si = 1.05, silane/propane/ethylene precursors, N₂ doping, HCl additive). Characterization analysis revealed pronounced polarity-dependent differences. AFM analysis showed that C-face epilayers exhibited smoother surfaces and reduced step bunching compared with Si-face layers. Optical and photoluminescence inspections show polarity-dependent defect propagation, with the C-face displaying reduced replication of extended defects under the explored conditions. However, nitrogen incorporation on the C-face orientation was more than 25× higher than Si-face orientation and displayed poor uniformity, highlighting the limited effectiveness of site-competition epitaxy on this orientation. In contrast, the Si-face provides tighter control of doping concentration and lateral uniformity, albeit with higher step bunching and rougher surfaces. These findings emphasize a fundamental trade-off in 4H-SiC homoepitaxy: the C-face offers morphological and structural advantages, while the Si-face ensures superior doping control and process stability. A deeper understanding of these polarity-dependent mechanisms is essential to optimize epitaxial growth strategies and to enable the design of high-performance SiC power devices.

Abstract: Synchrotron X-ray topography (XRT) combined with ray-tracing simulation was employed to examine the distribution and formation mechanisms of LAGBs in off-axis 4H-SiC wafers grown by PVT. Extensive TED-LAGB networks were observed adjacent to the facet, along with three TED-LAGBs emanating from micropipes on the left edge of the wafer. Ray-tracing simulations enabled the identification of TED Burgers vectors by correlating simulated and observed contrast configurations. The results suggest that large TED-LAGB networks near facets originate from misorientations between growth fronts of horseshoe-shaped steps incorporating prismatic slip dislocations, induced by radial temperature gradients. Similarly, LAGBs associated with micropipes arise from localized step-flow perturbations. These findings provide a revised mechanism for TED-LAGBs formation, establishing a link between their spatial distribution and growth dynamics, and offering new insights into their role in determining the quality of 4H-SiC substrates.