Papers by Keyword: AES

Abstract: Ternary (Si_1-xC_y)Ge_x+y solid solutions were grown on Si-face 4H-SiC applying atomic layer molecular beam epitaxy at low temperatures. The grown layers consist of twinned 3C-SiC revealed by cross section electron microscopy. The germanium was incorporated on silicon lattice sites as revealed by atomic location by channeling enhanced microanalysis transmission electron microscopy studies. The Ge concentration of the grown 3C-(Si_1-xC_y)Ge_x+y heteroepitaxial layers decreases with increasing growth temperatures, but exceeds the solid solubility limit.

Abstract: Generation of ultra-thin oxide layers (in the nanometer range) is currently a technological lock for numerous applications such as microelectronics, spintronics or even molecular electronics. A precise study of the stages of growth of Mg is essential before studying the growth of the oxide. In this work we report and discuss an experimental study of the very first stages of Mg growth onto Si(100) by Scanning Tunneling Microscopy-Spectroscopy (STM-STS), Auger Electron Spectroscopy (AES) and Low Energy Electron Diffraction (LEED). First, we have shown that an amorphous underlayer is formed onto the silicon substrate for Mg deposits of 0.25 monolayers (ML). This underlayer is attributed to a Mg₂Si silicide formed at RT during Mg deposition. Then, using an original growth method based on alternate cycles of magnesium monolayer adsorption and room temperature (RT) oxidation, we did grow ultra-thin magnesium oxide films onto Si(100). Our study revealed that the ultra-thin Mg₂Si layer at the MgO/Si(100) interface acts as a diffusion barrier and prevents oxidation of the highly-reactive silicon during magnesium oxide growth.

Abstract: According to the traditional AES algorithm, we present an optimized scheme, which offers an implementation of AES key expansion algorithm. The key expansion algorithm is shown by matrix in this scheme, then it is converted to look-up table, we use FPGA which has rich look-up table and storage resources to implement algorithm in parallel. The scheme reduces the complexity of the algorithm. As can be seen from experimental results, according to the needs of the encryption system, the system data processing speed and data throughput can be changed in real-time by changing the system clock.

Abstract: Modern encryption algorithms will focus on transforming rendered text block into a non-rendered block of symbols. The objective is to make the cipher block more non-interpretable. Distinguisher attack algorithm is used to distinguish cipher text from random permutation and other related algorithms. Currently, a cipher has been design to concentrate on distinguisher attack. In this research work, we have attempted to distinguish the cipher blocks of AES-128 (Advanced Encryption Standard) and AES-256 symmetric block cipher algorithms using an artificial neural network based classifier.

Abstract: Cipher chips, such as microprocessors, are playing the important role in most cryptosystems, and implementing many public cryptographic algorithms. However, Side channel attacks pose serious threats to Cipher chips. Optical Side channel attack is a new kind of method against cipher chips. Two methods are presented in this paper, which shows how to implement optical fault injection attacks against RSA and AES algorithms running on AT89C52 microchip, and demonstrates how to exploit secret information under attack.

Abstract: The key-stream generator is the most important algorithm component of the stream cipher and the security of the stream cipher is based on the property of the key-stream generator. At the present, it is still an important development direction of the stream cipher algorithm that the high performance key-stream generators are constructed with complex block cipher algorithms. This paper puts forward the new type of the key-stream generator based on the AES algorithm. This method is based on the OFB mode of the AES algorithm, combined with the variable-step feedback shift. Then the paper analyses the randomness of the key-stream produced by the new key-stream generator. This new key-stream generator really improves the cryptographic properties of the key stream generator and to enhance the security of stream cipher effectively.

Abstract: This paper mainly analyzed the security of AES(Advanced Encryption Standard) protocol and virtual private network technology ,the network 802.3 and 802.1x/EXP security vulnerabilities: defects of Service Set Identifier and MAC Address Filtering, defects of User Authentication Method, security vulnerabilities of WPA Algorithm, defects of 802.1x / EAP and RADIUS Authentication, etc. The authentication and encryption method to improve network security measures.

Abstract: AES (Advanced Encryption Standard) in May 26, 2002 became effective standard. AES algorithm research has become a hot topic at home and abroad, and the algorithm has been widely applied in the field of information security. Since the algorithm of AES key expansion part is open, so the key is between the wheel can be derived from each other, the AES algorithm designed for this security risk by generating pseudo-random number. Logistic mapping a certain length, after quantization is used as a key to improve the security of the AES algorithm.

Abstract: The key-stream generator is the most important algorithm component of the stream cipher. At the present, it is an important development direction of the stream cipher algorithm that uses complex block cipher algorithms to construct high performance key-stream generators. The paper puts forward a new design method of the key-stream generator based on the AES algorithm. This method is based on the CFB mode of the AES algorithm, combined with the variable-step feedback shift. Then the paper analyses the randomness of the key-stream produced by the new key-stream generator. This new key-stream generator really improves the cryptographic properties of the key stream generator and to enhance the security of stream cipher.

Abstract: On the Internet, most of media information is transmitted in plaintext. Some others can easily tamper or intercut the information, so there are threats to those information transmitted in plaintext. This paper designs a model of video encryption which uses AES algorithm and the model is based on FPGA platform. The model does the encryption in paralleling on XUPV5-110T development board. The encryption model can ensure the security and integrity of media information during the transmission process between a certain links on the network.