Papers by Keyword: Atomic Force Microscope (AFM)

Abstract: The selectivity, material removal rate, and the residual subsurface damage of colloidal silica (CS) chemi-mechanical polishing (CMP) of silicon carbide substrates was investigated using atomic force microscopy (AFM) and plan view transmission electron microscopy (TEM). Silica CMP, in most process conditions, was selective. In the damage region surrounding remnant scratches, the vertical material removal rate exceeded the planar material removal rate, which resulted in an enhancement of the scratches over the duration of the polishing process. The material removal rate was low, about 20 nm / hr. In addition, the selectivity leads to a slow removal of residual subsurface damage from mechanical polishing. The silica CMP polished surface exhibits significant subsurface damage observed by plan view TEM even after prolonged polishing of 16 hours.

Abstract: A new chemical mechanical polishing process (ACMP) has been developed by the Penn State University Electro-Optics Center for producing damage free surfaces on silicon carbide substrates. This process is applicable to the silicon face of semi-insulating, conductive, 4H, 6H, onaxis and off-axis substrates. The process has been optimized to eliminate polishing induced selectivity and to obtain material removal rates in excess of 150nm/hour. The wafer surfaces and resultant subsurface damage generated by the process were evaluated by white light interferometery, Transmission Electron Microscopy (TEM), Atomic Force Microscopy (AFM), and epitaxial layer growth. Residual surface damage induced by the polishing process that propagates into the epitaxial layer has been significantly reduced. Total dislocation densities measured on the ACMP processed wafers are on the order of the densities reported for the best as grown silicon carbide crystals [1]. Characterization of high electron mobility transistors (HEMTs) grown on these substrates indicates that the electrical performance of the substrates met or exceeded current requirements [2].

Abstract: This work reports the realization and characterization of 4H-SiC p+/n diodes with the p+ anodes made by Al+ ion implantation at 400°C and post-implantation annealing in silane ambient in a cold-wall low-pressure CVD reactor. The Al depth profile was almost box shaped with a height of 6×1019 cm-3 and a depth of 160 nm. Implant anneals were performed in the temperature range from 1600°C to 1700°C. As the annealing temperature was increased, the silane flow rate was also increased. This annealing process yields a smooth surface with a roughness of the implanted area of 1.7 - 5.3 nm with increasing annealing temperature. The resistivity of the implanted layer, measured at room temperature, decreased for increasing annealing temperatures with a minimum value of 1.4 0-cm measured for the sample annealed at 1700°C. Considering only the current-voltage characteristic of a diode that could be modeled as an abrupt p/n junction within the frame of the Shockley theory, the diode process yield and the diode leakage current decreased, respectively, from 93% to 47% and from 2×10-7 Acm-2 to 1×10-8 Acm-2 at 100 V reverse bias, for increasing post implantation annealing temperature.

Abstract: An n-type 8° off-axis <0001> 4H-SiC epitaxial wafer was processed. The n-type epilayer had doping and thickness of, respectively, ~3 × 1015 cm-3 and ~5 μm. p+/n diodes with not terminated junctions were constructed by a selective area implantation process of 9.2 × 1014 cm-2 Al+ ions at 400°C. The diodes had areas in the range 2×10-4 -1×10-3 cm2. The Al depth profile was 6×1019 cm-3 high and 164 nm thick. The post implantation annealing process was done in a high purity Ar ambient at 1600°C for 30 min. The diode current-voltage characteristics were measured in the temperature range 25-290°C. Statistics of 50-100 measurements per device type were done. The fraction of diodes that could be modeled as abrupt junctions within the frame of the Shockley theory decreased with increasing area value, but was always > 75%. The ideality factor was > 2 only at temperatures > 200°C and bias values < 1 V. The leakage current was extremely weak and remained of the order of 10-9 Acm-2 at 70°C and 500 V reverse bias. 4% of the diodes reached the theoretical voltage breakdown that was 1030 V. The surface roughness of un-implanted and implanted regions after diode processing was, respectively, 2 nm and 12 nm.

Abstract: The material properties of HfO2 thin films were studied to evaluate their potential as a high-κ gate dielectric in 4H-SiC power metal-oxide-semiconductor field effect transistors. Stoichiometric HfO2 films were deposited on n-type 4H-SiC (0001) by atomic layer deposition (ALD) at substrate temperatures of 250-450°C. No significant interfacial layer formation was observed by in-situ X-ray photoelectron spectroscopy (XPS) and an abrupt interface was confirmed by high-resolution transmission electron microscopy (HRTEM). A temperature-dependent transition from amorphous layer-by-layer growth to crystalline three-dimensional island growth was identified by in-situ reflection high-energy electron diffraction (RHEED) and ex-situ atomic force microscopy (AFM). X-ray diffraction (XRD) confirmed the presence of monoclinic HfO2 domains in crystallized films.

Abstract: The morphology and atomic structure of 4H-SiC(1102) and 4H-SiC(1102) surfaces, i.e. the surfaces found in the triangular channels of porous 4H-SiC, have been investigated using AFM, LEED and AES. After hydrogen etching the surfaces show steps parallel and perpendicular to the caxis, yet drastically different morphologies for the two isomorphic orientations. Both surfaces immediately display a sharp LEED pattern. Together with the presence of oxygen in the AES spectra this indicates the development of an ordered oxide. Both surfaces show an oxygen free, well ordered surface after Si deposition and annealing.

Abstract: The atomic structure of the 4H-SiC(11 2 0) surface including possible phase transformations via Si deposition and annealing has been investigated using low energy electron diffraction (LEED), Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM). The sample is initially prepared by hydrogen etching before loading into the ultra-high vacuum system. The sample is then out-gassed to remove oxygen from the surface. To explore the existence of ordered surface phases, Si is deposited on the sample at 850°C for 15 minutes followed by a series of sequential annealing steps. Throughout this process, the surface is monitored by LEED, AES and XPS. LEED shows that the surface continuously maintains a (1×1) periodicity. Yet, two unique and distinguishable (1×1) phases can be identified. The changes between these phases are clearly demonstrated by the LEED spot intensities. Simultaneously, the Auger and XPS data show a decrease in Si intensity.

Abstract: Selective epitaxial growth (SEG) of cubic silicon carbide (3C-SiC) was carried out on patterned Si (100) substrates using SiO2 as a mask. The growth was performed by atmospheric pressure chemical vapour deposition in a resistance-heated furnace using hexamethyldisilane (HMDS) as the source. It was observed that voids are the major defect in the case of heteroepitaxial growth of 3C-SiC on Si. Using selective epitaxial growth, the density of voids was reduced. Lateral epitaxial overgrowth (LEO) was achieved at selected areas where windows are arrays of stripes. The effect of temperature, window shape and size, precursor concentration, etc. on the SEG of SiC has been studied. After growth, films have been characterized by Nomarski optical microscopy, SEM, Raman spectroscopy and AFM. Faceted growth was observed along (111) planes inside smaller windows. Raman spectroscopy was used to identify defects and the presence of other polytypes.

Abstract: We report on further observations of homoepitaxially grown 4H silicon carbide (SiC) cantilevers on commercial on-axis mesa patterned substrates. Mesa shapes with hollow interiors were designed to significantly increase the ratio of dislocation-free cantilever area to pregrowth mesa area. Mesas that did not contain axial screw dislocations (SD’s) continued to expand laterally until uncontrolled growth in the trench regions rises up to interfere / merge with the laterally expanding cantilevers. Molten KOH etching revealed high defect density in regions where trench growth merged with the laterally expanding cantilevers. The remaining portions of the cantilevers, except for central coalescence points, remained free of dislocations.

Abstract: Recently, in some silicon carbide single crystals, some micropipes associated with screw dislocation have been observed by X-ray topography and the strain field around them produced images similar to those of screw dislocations with a very large Burgers vector, about 667 nm. The radius of the hole in the centre of the micropipe is less than 10 'm. This value and the theoretical predictions by Frank (about 7.8 mm) using the Burgers vector magnitude show a large discrepancy. In this paper we present Atomic Force Microscopy experiments around this kind of defects. The Burgers vector magnitude of the screw dislocation and the value of the radius have been measured by this technique. Not only one dislocation, but several have been observed around the micropipe. We concluded that it is in better agreement with the Frank theory modified by Cabrera and Levine concerning kinetic effects during the growth.