Papers by Keyword: Atomic Layer Deposition

Abstract: Membrane-based separation technology has grown significantly due to its cost-effectiveness, energy efficiency, easy system operations, and scale-up. The versatility of membrane application is also a significant factor in their widespread use in many separation processes. Their applications span water treatment, gas purification, energy production, and biomedicine. While promising, membrane technology still requires improvements in membrane features and performance, such as pore structure, fouling resistance, chemical stability, and concurrent enhancement of permeability and selectivity. Atomic Layer Deposition (ALD) has emerged as a powerful tool for enhancing membrane properties and performance through surface modification with atomic-scale precision, enabling conformal coatings, functional surface modification, and precise control over pore size. The ability of ALD to deposit uniform and conformal films on membrane substrates makes it a favourable modification technique. This review offers a concise yet informative discussion on the fundamentals of ALD, its integration with membrane modification, recent advancements in ALD-modified membranes, emerging trends in membrane modification via ALD, and challenges of ALD application in membrane modification.

Abstract: In this paper, we investigate the electrical and structural characteristics of Al₂O₃-based high-k gate dielectrics, which were integrated into a gate-first, high-temperature manufacturing process having comparable thermal budget as needed in 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) production. MOS capacitors were chosen as test devices to examine the electrical performance in terms of current-voltage (I-V) and capacitance-voltage (C-V) behavior. Remarkably, even after processing temperatures of up to 1,000 °C for ohmic contact formation, the Al₂O₃ layers revealed highly uniform breakdown characteristics, low C-V hysteresis and a flat-band voltage (V_FB) that closely aligns with the theoretical value. Time-dependent dielectric breakdown (TDDB) measurements of the Al₂O₃ MOS capacitors, however, showed a clear reliability disadvantage concerning the intrinsic dielectric lifetime when comparing with the SiO₂ counterpart from commercial SiC production. Finally, to better understand the electrical behavior, transmission electron microscopy (TEM) analysis was conducted, pointing out that high-temperature processing causes the Al₂O₃ films to transition from an amorphous state to an ordered, polycrystalline structure.

Abstract: This study investigates the interface and reliability of metal-oxide-semiconductor capacitors (MOSCAPs) based on 3C-SiC and 4H-SiC using atomic layer deposition (ALD) and post-deposition annealing (PDA). SiO₂ and HfO₂/SiO₂ were used as dielectric layers, with systematic PDA treatments conducted at 600°C, 900°C, and 1100°C in N₂ or forming gas (FG, a mixture of H₂ and N₂) environments to evaluate the impact of the PDA conditions on the interface characteristics of SiC MOSCAPs. The flat-band voltage for 3C-SiC MOSCAPs averaged at 0.68 ± 0.05 V for SiO₂/3C-SiC/Si samples and 2.35 ± 0.01 V for HfO₂/SiO₂/3C-SiC samples when MOSCAPs annealed at 1100°C in FG. PDA in forming gas also significantly reduced hysteresis, dropping from 1.75 V to 0.18 V for SiO₂/3C-SiC and from 2.49 V to 0.04 V for HfO₂/SiO₂/3C-SiC samples. For 4H-SiC MOSCAPs, as-deposited devices exhibited high oxide charges and poor interface quality. The average flat-band voltages for SiO₂/4H-SiC were 9.01 ± 0.15 V, while HfO₂/SiO₂ MOSCAPs showed 6.65 ± 0.02 V. After PDA at 1100°C, the flat-band voltage improved to-0.65 ± 0.035 V for SiO₂/4H-SiC and-0.50 ± 0.05 V for HfO₂/SiO₂/4H-SiC. Additionally, hysteresis was reduced from 0.61 V to 0.15 V for SiO₂/4H-SiC and from 0.23 V to 0.05 V for HfO₂/SiO₂/4H-SiC samples. We propose a figure of merit (FOM) which is defined as the ratio of the breakdown field to the product of flatband voltage shift, hysteresis effect, and density of interface states. The results demonstrate that PDA significantly enhances the interface quality and electrical characteristics of the MOS capacitors (MOSCAPs), with nitrogen (N₂) PDA yielding higher FOM for 4H-SiC stacks and forming FG PDA showing superior interfacial quality for 3C-SiC stacks.

Abstract: Zinc oxide (ZnO) thin films have attracted considerable attention due to their versatile applications in optoelectronic devices, transparent electrodes and surface acoustic wave devices. In particular, their photocatalytic properties make them interesting for wastewater treatment. In this study, we investigate the influence of substrate and film thickness on the structure and photocatalytic activity of ZnO thin films prepared by atomic layer deposition (ALD). The photocatalytic activity of ZnO films on Si, glass, Al, and porous Al substrates was investigated under UV irradiation, focusing on the decomposition of methylene blue (MB) as a model for an organic pollutant. To understand the mechanism of photodegradation, detailed information on the morphology of the nanostructured ZnO surface and the surface chemistry was obtained by scanning electron microscopy (SEM), secondary ion mass spectrometry (SIMS) and X-ray photoelectron spectroscopy (XPS). We have shown that the photocatalytic activity depends on ZnO film thickness and that it reaches saturation at a film thickness of about 20 nm, independent of the substrate. Furthermore, we compared the photocatalytic activity of ZnO films on flat substrates and porous aluminum (prepared by electrochemical anodization) at an optimal film thickness of 20 nm. Our results show that the ZnO thin film on porous aluminum has a significantly higher photocatalytic activity. After 300 minutes of UV lamp exposure, the ZnO thin film deposited on flat aluminum demonstrated the least photocatalytic activity, leading to a reduction of approximately 35% in the concentration of the MB solution. In contrast, the ZnO film coated on a porous anodic aluminum substrate exhibited the highest photocatalytic efficiency, with a reduction in the MB solution concentration by approximately 85%.

Abstract: We have studied the impact of nanosized grains of copper oxides, grown by atomic layer deposition (ALD), on photocatalytic activity of thin titanium dioxide (TiO₂) films under visible-light irradiation. The size of grains and the crystal phase of copper oxide were controlled by the number of ALD deposition cycles. The x-ray diffraction and x-ray photoelectron measurements revealed preferential formation of CuO for a small number of deposition cycles, while Cu₂O forms preferentially for a larger number of cycles. The photocatalytic efficiency of pristine TiO₂ has been enhanced for copper oxide/TiO₂ structures in which the nanosized copper oxide grains do not cover the entire TiO₂ surface. At the same time, the large increase of the current measured across the copper oxide/TiO₂ structures is consistent with the charge transfer from copper oxide grains to TiO₂, essential for the observed increase of photocatalytic activity.

Abstract: This article presents an innovative approach to achieve a high channel mobility for 4H-SiCp-MOSFET via dielectric-semiconductor interface engineering involving atomic layer deposition(ALD) of ultrathin B₂O₃ and SiO₂ stacks. The application of ultrathin boron oxide via ALD introducesa highly manufacturable solution for the passivation of SiC interface. The interface states near valenceband reduces the channel mobility for SiC p-MOSFETs and increases the threshold voltage. Theintroduction of ultrathin B₂O₃ interlayer reduces the threshold voltage and improves the field effectmobility to 12.60 cm²/Vs while the p-MOSFET without the interlayer provides the mobility of 8.91cm²/Vs. This work also includes the optimization of the post-deposition annealing (PDA) conditionsspecific to ultrathin B₂O₃ and bulk SiO₂ dielectric stack to obtain high field effect channel mobilityfor SiO₂/SiC p-MOSFETs.

Abstract: Today, Atomic Layer Deposition (ALD) sets the limits for achieving nanometer precision of thin, yet almost dense films. However, the initial growth process, determining possible film thinness, is poorly understood. A better understanding can be obtained with the help of in-situ characterization during film growth with high spatial and chemical resolution. Transmission Electron microscopy (TEM) would be a suitable and widely available technique to accomplish this objective. However, standard instruments have differing vacuum requirements than those necessary for ALD. During ALD, TEM detectors could be damaged as they are being exposed to corrosive volatile chemical compounds. Here we present a dedicated TEM holder design, where ALD deposition occurs inside a microchip containing a large area cavity surrounded by thin film Al₂O₃ membranes. These membranes act as windows for TEM characterization while decoupling the ALD process from the TEM environment. The microchip consists of longitudinal large overhang shell structures, themselves made by ALD and etched in an HF vapor etch processes. The set-up, which includes controlled heating, was tailored to ALD requirements, and passed a vacuum-pressure test. Post-mortem inspection of film growth on a silicon sample chip demonstrates the successful formation of an ALD Al₂O₃ film with 40 nm thickness inside the cavity. These results demonstrate the potential of the system to enable a range of experiments on growth phenomena that may lead to even thinner films and better control of interfaces than previously possible.

Abstract: A study on the impact of different growth and deposition techniques on the reliability of silicon dioxide (SiO₂) layers on silicon carbide (SiC) metal-oxide-semiconductor capacitors (MOSCAPs) is presented and compared to channel mobilities that were extracted from lateral metal-oxide-semiconductor field-effect transistors (LMOSFETs). Oxide layers were formed using atomic layer deposition (ALD), low pressure chemical vapour deposition (LPCVD) and direct thermal growth, including post-deposition anneals (PDAs) in nitrious oxide and forming gas (FG) for the ALD-and LPCVD-deposited oxides. Electrical characterisation results at elevated temperatures show that a PDA in FG leads to the highest average breakdown electric field of 10.08 MV/cm, outperforming all other device splits. Time-dependent dielectric breakdown (TDDB) results showed that the time to failure of 63% of the investigated samples at 9MV/cm in the FG-annealed samples was about 50% higher than in LPCVD-deposited oxides that had undergone an N₂O PDA. Channel mobilities of the FG-treated samples averaged about three to four times higher than in other datasets, showing excellent peak field-effect mobilities of 60 cm²/V.s and 108 cm²/V.s at room temperature and 175°C, respectively.

Abstract: A systematic capacitance-voltage (C-V) and time-dependent dielectric breakdown (TDDB) study on silicon carbide (SiC) metal-oxide-semiconductor capacitors (MOSCAPs) that use silicon dioxide (SiO₂) is shown in this paper. Oxides were formed using atomic layer deposition (ALD), low-pressure chemical vapour deposition (LPCVD) or direct thermal growth in nitrous oxide (N₂O) ambient, where both deposited oxides were post-deposition annealed in N₂O ambient, too. The electrical characterisation results reveal that the ALD-deposited and N₂O-annealed oxides show the best capacitance-voltage (C-V) characteristics, with flatband and hysteresis voltages (V_FB) averaging 1.44 V and 0.41 V, respectively. When measuring the leakage current levels at 175°C, the ALD-deposited MOSCAPs’ breakdown electric fields are averaging similar to their counterparts at 9.71 MV/cm. MOSCAPs which utilized ALD-deposited SiO₂ also showed 29% and 345% increased average injected charge-to 63% failure (Q_BD,63%) at 9 MV/cm and 9.6 MV/cm, respectively, when comparing these devices to their direct thermally grown SiO2 counterparts.

Abstract: The development of flexible electronics towards for the direction of bend ability, lightweight, portability, long life against falling. The performance of the substrate in the flexible electronics plays a very important role in the development of electronics. In this article, three preparation technologies of thin films are introduced, including CVD, PVD and ALD. The paper also introduces the research progress on the preparation of substrate barrier films, and one main challenge that may face by the preparation of thin film materials. In order to satisfy the development of flexible electronics, improving the substrate’s performance constantly is needed. Finally, the development of preparing barrier films is prospected.