Authors: Hitesh Jayaprakash, Constantin Csato, Masashi Kato, Tong Li, Florian Krippendorf, Michael Rueb
Abstract: Bipolar degradation poses a significant concern for the reliability of SiC bipolar power devices. The basic cause for bipolar degradation is expansion of Shockley Stacking Faults SSFs. These glide planes can be pinned and prevented from expansion. This study involves 19 MeV Energy Filtered Ion Implantation of Nitrogen (i.e. resulting in an energy spectrum ranging from 0 MeV to nearly 19 MeV in one shot) to explore the pinning effect of Nitrogen ions that suppresses recombination glide, which minimizes SSF growth, while providing precise doping of the entire drift region by the same Nitrogen implantation. All is performed in one single step. This procedure paves the path to immobilize any nucleation sites in the entire drift layer, this way enhancing the reliability and facilitating mass production of SiC power devices. This study employs UV illumination as an optical stressing method to create e-/h+ pair, which subsequently induce 1SSF expansion. Both, UV induced 1SSF expansion and pining were observed by photoluminescence. Carrier lifetime measurements were employed for understanding the mechanism of pinning defects.
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Authors: Hiroki Niwa, Takanori Tanaka, Kazuya Ishibashi, Hiroyuki Amishiro, Akifumi Imai, Yasuhiro Kagawa, Katsutoshi Sugawara, Tatsuro Watahiki
Abstract: In this study, high current stress was applied to the body diode of SiC-MOSFETs, and chips exhibiting leakage current degradation due to the bipolar degradation phenomenon were analyzed to identify the crystal defects responsible for the abnormal leakage current. Failure analysis and defect inspection during the device fabrication process revealed that abnormal leakage occurred at the periphery of extended stacking faults originating from or near the micropipe itself. As these extended stacking faults also increase the forward voltage drop of MOSFETs, these results suggest that micropipe are critical defects in SiC-MOSFETs inducing both forward voltage and leakage current degradation in the bipolar degradation phenomenon.
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Authors: Chiara Nania, Domenica Raciti, Cristiano Calabretta, Fabiana Vento, Ruggero Anzalone, Enzo Fontana, Andrea Severino
Abstract: The increasing demand for WBG materials like SiC has led STMicroelectronics to expand wafer diameter from 150 mm to 200 mm, enhancing production yield and reducing costs. However, this expansion poses challenges in preserving crystalline quality. This investigation examines the impact of defects on 200 mm wafers, focusing on Total Usable Area (TUA) and electrical performance, particularly in wafers with polytype inclusions and high basal plane dislocation (BPD) density. Although the results for non-standard wafers show a significant reduction in TUA and an increase in electrical failures, the overall distribution of functional and non-functional devices remains stable, indicating process consistency.
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Authors: Robert Leonard, Matthew Conrad, Edward van Brunt, Jeffrey Giles, Ed Hutchins, Elif Balkas
Abstract: A non-destructive, fast and accurate extended defect counting method on large diameter SiC wafers is presented. Photoluminescence (PL) signals from extended defects on 4H-SiC substrates were correlated to the specific etch features of Basal Plane Dislocations (BPDs), Threading Screw Dislocations (TSDs), and Threading Edge Dislocations (TED). For our non-destructive technique (NDT), automated defect detection was developed using modern deep convolutional neural networks (DCNN). To train a robust network, we used our large volume data set from our selective etch method of 4H-SiC substrates, already established based on definitive correlations to Synchrotron X-Ray Topography (SXRT) [1]. The defect locations, classifications and counts determined by our DCNN correlate with the subsequently etch-delineated features and counts. Once our network is sufficiently trained we will no longer need destructive methods to characterize extended defects in 4H-SiC substrates.
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Authors: Jun Kojima, Yuichiro Tokuda, Emi Makino, Naohiro Sugiyama, Norihiro Hoshino, Isaho Kamata, Hidekazu Tsuchida
Abstract: In order to diffuse the use of SiC, mass-production technologies of SiC wafers are needed. It is easy to be understood that high-speed and long-sized growth technologies are connected directly with mass-production technologies. The gas source growth method such as HT-CVD has the possibilities and the potential of the high-speed and long-sized growth. In this article, it was clarified that the high growth rate were achieved by the control of the source gas partial pressures and by the gas boundary layers. The average growth rate was 1mm/h on the f4 inch-diameter crystal, and the maximum growth rate reached 3.6 mm/h on the 12.5x25 mm tetragon by the above gas control. The crystal qualities of the gas source methods were also evaluated the equivalent level in comparison with the sublimation method. Concerning the 1mm/h-growth f3 inch crystal, the densities of TSDs were kept in the 102 cm-2 levels from the seed to the upper-side of the ingot. Moreover, the ingot size increased year by year and a f4 inch x 43 mm sized ingot has been developed.
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Authors: Toshiyuki Isshiki, Masaki Hasegawa
Abstract: Two types of shallow surface defects associated with treading dislocation were found out by using mirror projection electron microscope. One was single groove with a dimension of about 4 nm in depth, 2 μm in width and 15 μm in length, named “as nanogroove”. The other was a shallow groove at 1.3nm in depth being between pair of hillocks at 2-3 nm in height and 1.5 μm in distance, named as “nanohillock pair”. Dislocations combined with the defects were found out by micro-KOH etching method with low-energy scanning electron microscopy. The dislocations were identified by g-b analysis using scanning transmission electron microscopy as threading edge dislocations converted from basal plane dislocation at bulk-epi layer interface or within epi layer.
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