Authors: Yoshiaki Daigo, Akio Ishiguro, Shigeaki Ishii, Hideki Ito
Abstract: 4H-SiC homo-epitaxial films were grown using a high speed wafer rotation vertical CVD tool, and effects of wafer rotation speed during initial temperature ramping before epitaxial growth were investigated. Also, the effects of conditions during growth of the highly doped buffer layer on both surface and PL defect densities were investigated. It was found that the wafer rotation speed during the temperature ramping has a large influence on the surface defect density of the films. Especially, triangles generated from small pits were considerably reduced in the samples grown at a higher wafer rotation speed during the temperature ramping. The phenomena could be explained as a result of suppressed interfacial reaction between down-falls (DFs) and the wafer surface. Additionally, it was found that the density of basal plane dislocations (BPDs) on a drift layer is remarkably reduced by adjusting the C/Si ratio during growth of the buffer layer grown prior to the drift layer. By applying higher wafer rotation speed during the temperature ramping and optimizing the C/Si ratio for the growth of the buffer layer, a total defect density of 0.75 cm-2 on the film, which includes DFs, triangles, DF-triangles, stacking faults (SFs) and BPDs, was achieved.
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Authors: Gan Feng, Wei Ning Qian, Yong Qiang Sun, Zhi Xia Chen, Jian Hui Zhao
Abstract: The glide of basal plane dislocations (BPDs) during 150 mm 4H-SiC epitaxial growth by a hot-wall reactor is characterized, and its formation mechanisms are discussed. The reason for the glide of BPDs during 150 mm 4H-SiC epitaxial growth is believed to be due to the strain related to the strain originally in the 150 mm substrate and the strain generated during the epitaxial growth. After the epitaxial growth process is optimized, it is possible to suppress the glide of BPDs, as a result of the effective relaxation of the strain.
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Authors: Hiroshi Osawa, Y. Mabuchi, Yoshitaka Nishihara, L. Guo, N. Ishibashi, K. Fukada, Koji Kamei, Kenji Momose
Abstract: SiC-powered devices which reduce the power loss, size, and weight of power converters are gradually appearing in the power electronics market. From now on, cost reduction and quality improvement of SiC epitaxial wafers is required to further increase their popularity. This paper describes the state of development of mass production of the epi-wafer at Showa Denko K. K.
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Authors: Keiji Wada, Takemi Terao, Hironori Itoh, Tsutomu Hori, Hideyuki Doi, Masaki Furumai, Tatsuya Tanabe
Abstract: Epitaxial growth of 4H-SiC on 150 mm wafers has been investigated using experimental results and numerical simulations toward the goal of BPDs reduction and doping uniformity control in the epitaxial layer. We have reported analyses of the temperature distribution dependence of the doping uniformity and BPDs propagations on the 3 x 150 mm multi-wafer CVD epitaxial growth. By optimizing epitaxial growth conditions, we have demonstrated an excellent doping and thickness uniformity and a 99.9% BPD free region, simultaneously.
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Authors: Yoshitaka Nishihara, Koji Kamei, Kenji Momose, Hiroshi Osawa
Abstract: This study investigated the relationship between the forward voltage degradation induced by SSF expansion and (a) BPD density in substrates and epitaxial layers of SiC, and (b) the temperature during the application forward current to the pin diodes. The Vf shift caused by the BPDs in the drift layer simply depended on the BPD density. However, no correlation was initially observed between the Vf shift and BPD density in the substrate; instead a strong correlation was observed between the Vf shift and the device temperature measured when applying the current stress. Thus when we selected samples which show the same temperature at that time, a correlation was observed between the Vf shift and the BPD density in the SiC substrate, with the slope corresponding to the former, drift layer relationship. Therefore, due to the high BPD density in the SiC substrate, suppressing the Vf shift due to BPD density in this region is highly important, and a combination of approaches is therefore proposed in order to reduce the overall forward voltage degradation.
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Authors: Kumiko Konishi, Ryusei Fujita, Yuki Mori, Akio Shima
Abstract: We investigated process induced defects at various ion implantation conditions, and evaluated forward voltage degradation of body diode in 3.3 kV SiC MOSFET. First, by using photoluminescence (PL) observation, we evaluated the formation level of Basal Plane Dislocations (BPD) induced by Al implantation and anneal process with various Al implantation dose. Second, 3.3 kV double-diffused SiC MOSFETs were fabricated and forward current stress tests were performed to body diodes in SiC MOSFETs. Then, electrical characteristics of SiC MOSFETs before and after the stress test were measured, and expanded Stacking faults (SFs) in SiC epitaxial layer after the stress test were observed by PL imaging method. These results indicate that low dose or high temperature Al implantation conditions can suppress the formation of BPDs, and SiC MOSFETs fabricated using optimized Al implantation conditions show high reliability under current stress test.
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Authors: R.T. Leonard, M.J. Paisley, S. Bubel, J.J. Sumakeris, A.R. Powell, Y. Khlebnikov, J.C. Seaman, J. Ambati, Albert A. Burk, Michael J. O’Loughlin, E. Balkas
Abstract: In this work, aggregate epitaxial carrot distributions are observed at the crystal, wafer and dislocation defect levels, instead of individual extended carrot defect level. From combining large volumes of data, carrots are observed when both threading screw dislocations (TSD) and basal plane dislocations (BPD) densities are locally high as seen in full wafer maps. Dislocation density distributions in areas of carrot formation are shown, and suggest TSD limit the formation of carrots in regions containing BPD. These data also add support for mechanisms requiring the need for both dissociated BPD and TSD for carrot formation.
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Authors: Naoto Ishibashi, Keisuke Fukada, Akira Bandoh, Kenji Momose, Hiroshi Osawa
Abstract: This paper presents a high-quality 100/150 mm p-type 4H-SiC epitaxial wafer prepared by chemical vapor deposition; this wafer is suitable for high-voltage bipolar device applications. The density of killer defects for bipolar devices including downfalls, triangular-shaped defects, and basal plane dislocations (BPDs), is less than 0.1 cm-2 in the proposed 100 mm n/p multilayer epitaxial wafer. The in-plane thickness and doping uniformity of the 150 mm p-layer is 3.0% and 11.0%, respectively. The doping concentration of the p-layer can be controlled in the 1E+16 cm-3 to 1E+19 cm-3 range.
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Authors: Hrishikesh Das, Swapna Sunkari, Hans Naas, Martin Domeij, Andrei Konstantinov, Fredrik Allerstam, Thomas Neyer
Abstract: In this work, the detection and characterization of various crystal defects in high doped silicon carbide by photoluminescence (PL) is explored. The detection of basal plane dislocations in high doped epitaxial buffer layers is demonstrated using the near ultraviolet (NUV) spectra. Several characteristic defects in high doped 150mm substrates like grain boundaries and screw dislocations are also detected and characterized using the NUV PL spectra. Further characterization using molten potassium hydroxide etching is presented.
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Authors: Tsukasa Hori, Kenta Murayama, Shunta Harada, S. Xiao, M. Tagawa, Toru Ujihara
Abstract: The relationship between surface morphology and spatial distribution of basal plane dislocations in 4H-SiC crystal grown by top-seeded solution growth on the C face was investigated by the differential interference microscopy as well as X-ray topography. Basal plane dislocations were generated at the boundaries of the domains with the different macrosteps advance directions. On the other hand, at the position where macrosteps advance to the same direction, BPDs were hardly observed. This results suggest that BPD density can be decreased by the suppression of the collision of macrosteps during the solution growth on the C face controlling the surface morphology.
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