Papers by Keyword: Bipolar Junction Transistor (BJT)

Abstract: The influence of varying the emitter-base geometry, i.e., the emitter width (W_E), emitter contact–emitter edge distance (W_n), and base contact–emitter edge (W_p) on the on-state characteristics in 5.6 kV implantation free 4H-SiC BJTs are investigated. The BJTs present a clear emitter size effect pointing out that surface recombination has a significant influence on current gain (β). The results show that the influence of varying W_p on the β is higher than W_n. A distance of 3 μm between emitter contact and base contact to the emitter edge (W_n = W_p = 3 μm) is the optimized value to have a BJT with a high β, and low on-resistance (R_ON) at a given W_E.

Abstract: This paper presents a monolithic 4H-SiC BJT latched emitter-coupled logic (ECL) comparator for high temperature analog-to-digital conversion. The comparator consists of a low-gain pre-amplifier, a track and latch stage and an output buffer. For low-speed input signals, the comparator input offset voltage is 3.9 mV at 27 °C and monotonically increases up to 9.1 mV at 500 °C. The single-ended output swing is 5.5 V at 27 °C and 3.9 V at 500 °C. The minimum comparison time is around 1μs from 27 °C to 500 °C. The whole comparator dissipates 464 mW in average over the considered temperature range with a 15 V power supply. It consumes 2.25 × 0.84 mm² chip area (with the bond pads included).

Abstract: Integrated digital circuits, fabricated in a bipolar SiC technology, have been successfully tested up to 600 °C. Operated with-15 V supply voltage from 27 up to 600 °C OR-NOR gates exhibit stable noise margins of about 1 or 1.5 V depending on the gate design, and increasing delay-power consumption product in the range 100 - 200 nJ. In the same temperature range an oscillation frequency of about 1 MHz is also reported for an 11-stage ring oscillator.

Abstract: A single-mask junction termination extension withtrench structures is formed to realize a 4.5 kV implantation-free 4H-SiCbipolar junction transistor (BJT). The trench structures are formed on the baselayer with dry etching using a single mask. The electric field distributionalong the structure is controlled by the number and dimensions of the trenches.The electric field is distributed by the trench structures and thus the electricfield crowding at the base and mesa edges is diminished. The design isoptimized in terms of the depth, width, spacing, and number of the trenches toachieve a breakdown voltage (V_B) of 4.5 kV, which is 85% of thetheoretical value. Higher efficiency is obtainable with finer lithographicresolution leading to smaller pitch, and higher number and narrower trenches.The specific on-resistance (R_ON) of 20 mΩ.cm² is measuredfor the small-area BJT with active area of 0.04 mm². The BV-R_ONof the fabricated device is very close to the SiC limit and by far exceeds thebest SiC MOSFETs.

Abstract: Ion implantation in silicon carbide (SiC) induces defects during the process. Implantation free processing can eliminate these problems. The junction termination extension (JTE) can also be formed without ion implantation in SiC bipolar junction transistor (BJT) using a well-controlled etching into the epitaxial base layer. The fixed charges at the SiC/SiO₂ interface modify the effective dose of the JTEs, leakage current, and breakdown voltage. In this paper the influence of fixed charges (positive and negative) and also interface trap density at the SiC/SiO₂ interface on the breakdown voltage in 4.5 kV 4H-SiC non-ion implanted BJT have been simulated. SiO₂ as a surface passivation layer including interface traps and fixed charges has been considered in the analysis. Simulation result shows that the fixed charges influence the breakdown voltage significantly more than the interface traps. It also shows that the positive fixed charges reduce the breakdown voltage more than the negative fixed charges. The combination of interface traps and fixed charges must be considered when optimizing the breakdown voltage.

Abstract: The aim of this study consists in comparing effects of temperature on various Silicon Carbide power devices. Static and dynamic electrical characteristics have been measured for temperatures from 80K to 525K.

Abstract: In this paper effects of carbon (C), silicon (Si) and nitrogen (N) implantation on the interface properties of 4H-SiC/SiO₂ and the implications for 4H-SiC bipolar junction transistors (BJT) passivation are discussed. 4H-SiC epi-layer have been implanted with ¹²C, ¹⁴N and ²⁸Si ion at three different doses with energies of 3, 3.5 and 6 keV, respectively, resulting in a projected range of 8 nm for the three ions. Then metal oxide semiconductor (MOS) structures with SiO₂ as dielectric have been fabricated. Capacitance voltage measurements show an increase in the negative fixed charges for all the implanted samples as a function of implantation induced damage. Similarly, in the case of C and Si, the surface roughness increases as a function of dose and the mass of the ions. No reduction of D_its due to the implantations is seen for any of the ions. Furthermore, TCAD device simulations of npn bipolar junction transistors (BJT), using the interface and fixed charges extracted from CV measurements, show a way to further optimize current gain and breakdown properties for the BJT.

Abstract: With the commercial availability of SiC power transistors, this decade will mark an important breakthrough in power transistor technology. However, in power electronic systems, disturbances may place them in short-circuit condition and little knowledge exist about their SC capability. This paper presents our study of SiC MOSFETs, JFETs and BJT under capacitive load short-circuit up to 600V.

Abstract: This paper proposes a new structure of 4H-SiC bipolar junction transistor, which can both achieve high current gain and high open base breakdown voltage. By introducing a groove type of metal-high k dielectric-silicon carbide (MIS) structure into the active region along the base-emitter sidewall which is formed with the process of isolation etching, a large electric field appears at the interface between high-k dielectric and bulk material by analyzing the potential distribution in forward mode, thus accelerating the electron transport. Based on a doping concentration of 4×10¹⁷cm^-3 and thickness of 0.6um base region, current gain of as high as 191 is obtained using TCAD simulation, and that is almost double of the conventional structure in the same simulation setup. Furthermore, a field plate structure is composed combined with the base contact metal simultaneously, and the open base breakdown voltage is obviously increased from 634V to 948V with a 6μm-thick n-SiC collector (N_d=3×10¹⁵cm^-3).

Abstract: Two versions of Schmitt trigger, an emitter-coupled and an operational amplifier (opamp)-based, are implemented in 4H-SiC bipolar technology and tested up to 500 °C. The former benefits the simplicity, smaller footprint, and fewer number of devices, whereas the latter provides better promise for high temperature applications, thanks to its more stable temperature characteristics. In addition, the measurements in the range 25 °C - 500 °C, shows that the opamp-based version provides negative and positive slew rates of 4.8 V/µs and 8.3 V/µs, ~8 and ~3 times higher than that of the emitter-coupled version, which are 1.7 V/µs and 1 V/µs.