Papers by Keyword: Breakdown Voltage

Abstract: 10 kV class 4H-SiC bipolar diodes have been fabricated. Two different edge terminations (Mesa/JTE or MESA/JTE with JTE rings) with two different junction bend radius have been designed and tested. Measurement results show that the inclusion of JTE rings improve the edge termination efficiency. The measurements indicate also a better reverse performance of diodes with larger bend radius.

Abstract: A 4H-SiC trench MOSFET has been developed that features trench gates with a thick oxide layer on the bottoms of the trenches. The maximum electric field strength and gate-drain charge of this device are 46% and 38%, respectively lower than that of a conventional MOSFET. The drain-source breakdown voltage is 1400V and the specific on-resistance is 4.4mΩcm2 at a gate bias of 20V and a drain voltage of 2V.

Abstract: A new-style high-voltage switch named trigatron with great advantage, such as simple structure and applying circuits, wide operational temperature and voltage range, short delay time, long operational life is introduced in this paper. Firstly the four operational modes which trigatrons are suitable for pulse power devices are presented. Then through experimental study and theoretical analysis, the effect factors of turn-on time of trigatrons are summed up, including anode voltage, triggering voltage and triggering-wire’s length, finally giving a conclusion that the higher anode voltage and triggering pulse voltage are, the more steady and shorter turn-on time is.

Abstract: A highly heat-dissipating and high-voltage SOI-LDMOS power device is proposed. Its substrate was selectively etched, like the Camsemi SOI, so breakdown voltage was decided only by lateral breakdown voltage. A p-type layer and a Si3N4 buried layers were introduced into the new structure for lowering specific on-resistance and temperature. The simulation results show that breakdown voltage is 747 V at the 37 μm length of the drift region, and specific on-resistance and maximum surface temperature are reduced by 94.48% and 15.43% than those of Camsemi SOI, respectively.

Abstract: A slope SOI-LDMOS power device is proposed for high-voltage. When a positive bais is applied to the drain electrode, holes are induced and astricted by the slope buried oxide layer. So a high density positive charge layer is formed on the buried oxide layer. The electrical field in the buried oxide is improved as well as vertical breakdown voltage by the layer. Because the thickness of the drift region linearly increases from the source to the drain, the surface electric field is optimized, resulting in increase of lateral breakdown voltage. In this paper, the electric characteristics of the new device are simulated by Medici softerware. The result is shown that above 600 V breakdown voltage is obtained at 1μm thick buried oxide layer. The breakdown voltage is higher by three times than that of conventional SOI LDMOS.

Abstract: Novel device design and process innovations made at GeneSiC on SiC JBS rectifiers result in a significant increase in surge current capability with a 33% decrease in power dissipation at 10x rated current. On the 1200 V-class rectifiers, a clear signature of avalanche-limited breakdown with ultra-low leakage currents is observed at temperatures as high as 240 °C. Almost temperature independent Schottky barrier heights of 1.2 eV and ideality factors 2K² (for 4H-SiC) is directly extracted from the forward I-V characteristics. When compared with an off-the-shelf all-Si IGBT power co-pack, GeneSiC’s GA100XCP12-227 co-pack offers 88% and 47% reduction at 125 °C in the IGBT and free-wheeling diode switching energy losses, respectively. This results in an overall switching loss reduction of about 28% as compared to its silicon counterpart.

Abstract: Optical Beam Induced Current (OBIC) measurements have been performed on 4H-SiC avalanche diodes with very thin and highly doped avalanche region. The light source used in this study is an Ar-laser with a wavelength of 351 nm which results in a mixed carrier injection. From these measurements, impact ionization coefficients for 4H-SiC have been extracted in the electric field range from 3 to 4.8 MV/cm. In combination with ionization coefficients in our previous paper extracted from diodes with lowly doped avalanche region, we propose a set of parameters of impact ionization coefficients for 4H-SiC, applicable to a wide electric field range.

Abstract: 1200 V-Class Super-High Current Gain Transistors or SJTs developed by GeneSiC are distinguished by low leakage currents of 2. Two-stage cascaded SJTs display a record high current gain of 3475. Results from detailed on-state, blocking, switching and reliability characterization of 1200 V-class 4 mm² and 16 mm² SiC SJTs are presented in this paper.

Abstract: Sharp avalanche breakdown voltages of 12.9 kV are measured on PiN rectifiers fabricated on 100 µm thick, 3 x 10¹⁴ cm-3 doped n- epilayers grown on n+ 4H-SiC substrates. This equates to a record high 129 V/µm for a > 10 kV device. Optimized epilayer, device design and processing of the SiC PiN rectifiers result in a > 60% blocking yield at 10 kV, ultra-low on-state voltage drop and differential on-resistance of 3.75 V and 3.3 mΩ-cm² at 100 A/cm² respectively. Open circuit voltage decay (OCVD) measured carrier lifetimes in the range of 2-4 µs are obtained at room temperature, which increase to a record high 14 µs at 225 °C. Excellent stability of the forward bias characteristics within 10 mV is observed for a long-term forward biasing of the PiN rectifiers at 100 A/cm2. A PiN rectifier module consisting of five parallel large area 6.4 mm x 6.4 mm 10 kV PiN rectifiers is connected as a free-wheeling diode with a Si IGBT and 1100 V/100 A switching transients are recorded. Data on the current sharing capability of the PiN rectifiers is also presented.

Abstract: An extensive study on the use of Si as a substrate for the growth of AlGaN/GaN layers for High-Electron-Mobility Transistor (HEMT) were studied and reported in this article. We have used thick buffers to grow high resistive i-GaN by MOCVD which offers a high breakdown voltage. While the leakage through buffer and substrate can be controlled by thick buffer, the leakage through gate is controlled using a thin 2-nm in-situ grown i-GaN cap layer. We have evidenced a high figure of merit (BV²/R_ON) of 2.6 x 10⁸ V²Ω^-1cm^-2 for AlGaN/GaN HEMTs grown on 4-inch Si substrate. The challenges before the MOCVD growth of GaN on Si is also discussed in detail.