Papers by Keyword: Cu Interconnects

Abstract: Megasonic cleaning has been one of the most successful techniques for Cu/low-k interconnects post-CMP cleaning. The structural deformation and stress of Cu and low-k materials in megasonic cleaning are examined with finite element method (FEM). The maximum stress is concentrated in the binding area between Cu and low-k. With decrease of Cu line width, the maximum stress increases and the max value exceeds the yield strength of Cu which results in the plastic deformation. The increasing frequency will change the bubble collision times. Therefore the fatigue is potential. The maximum displacement moves from center to the sides of top surface with increase of line width. When the line width is 25nm, the deformation is the largest.

Abstract: This paper presents a research on skin effect’s influence on the current density distribution of Cu/barrier layer and Cu/cap layer interfaces of copper interconnects’ via vicinities. A two-level Cu-interconnect structure in different positional relationships with the ground plane is discussed. Through the three-dimensional (3D) finite element simulation of the interconnect structure, the variations of current density on three important surface areas are obtained when skin effect is significant, showing that the current density in the three surface areas near the via has been strongly influenced by current crowding and skin effect. So in many cases the influence of skin effect on via top and via bottom failures of Cu interconnects under high frequencies can not be ignored.

Abstract: The effect of trench aspect ratio and line spacing on microstructure and texture in annealed damascene Cu interconnects has been investigated. The X-ray diffraction (XRD) and electron backscatter diffraction (EBSD) analyses of Cu lines, showed a preferred {111} orientation and the trenches reduce the proportion of high-angle grain boundaries and increase the fraction of coincidence site lattice (CSL) grain boundaries, comparing with the Cu blanket film. In addition, both trench aspect ratio and line spacing can largely affect the microstructure and texture in annealed damascene Cu interconnects.

Abstract: Cu interconnects are essential in advanced integrated circuits to minimize the RC delay. In manufacturing these devices, Cu is deposited electrochemically using a plating bath containing organic additives. The as-deposited nanocrystalline Cu films undergo self-annealing at room temperature to form a micronsized grain structure by abnormal grain growth. Systematic experimental studies of self-annealing kinetics on model Cu films deposited on a Au substrate suggest that the rate of grain size evolution depends primarily on the initial grain size of the asdeposited film. A model for the observed abnormal grain growth process is proposed. Assuming that desorption of the organic additives leads to mobile grain boundaries, the onset of abnormal grain growth is attributed to a sufficiently low additive concentration such that a full coverage of all grain boundaries cannot be maintained. The incubation time of abnormal growth is then a logarithmic function of the initial grain size. The probability to find a growing grain is proportional to the number of grains per unit volume. This assumption is seen to be in good agreement with the experimental observations for subsequent abnormal grain growth rates. The limitations of the proposed model and the challenges to obtain further insight into the complex microstructure mechanisms during self-annealing are delineated.