Papers by Keyword: Edge Termination

Abstract: In high-voltage class SiC devices, maintaining sufficient robustness against humidity and fabrication processes has become a major concern when minimizing the edge termination size. Previous research has shown that suppressing the maximum electric field on the SiC surface in the termination region improves durability in HV-H³TRB tests for 3.3 kV SBDs. In this study, we investigated the impact of the FLR design on the electric field distribution in the termination region. Simulation results showed that the termination length can be reduced without changing the maximum electric field on the SiC surface and the breakdown voltage. Furthermore, the fabricated 4.5 kV SiC SBD-embedded MOSFETs exhibited good reverse leakage characteristics, which were consistent with the simulation results.

Abstract: A charge-imbalanced P-pillar distribution termination (D3) is proposed for 1500 V-class 4H-SiC superjunction (SJ) devices. By combining a junction termination extension (JTE)-based termination with gradually widened P-pillar spacing, the design effectively suppresses edge electric field crowding and enhances device reliability. TCAD simulations show that D3 achieves comparable blocking capability while exhibiting significantly improved robustness against charge imbalance, oxide charge density, and JTE dose deviations, demonstrating superior process margin and reliability. With relaxed process sensitivity and an efficient structure, D3 presents a promising approach for high-voltage 4H-SiC SJ device fabrication.

Abstract: This paper shows results of SiC Schottky diodes fabricated without ion-implanted P-type regions. Diodes with blocking voltages up to 4,500 V are demonstrated utilizing an epitaxial P-type ring with sloped edges for the edge termination. Reverse-bias currents at temperatures higher than 60°C, and at nominal blocking voltages of 650 V, 1200 V, and 1700 V, are shown to match the theoretical values based on the two fundamental current mechanisms: tunneling and thermionic emission. In comparison to JBS and MPS diodes, the whole anode area is active, which enables homogeneous current flow and comparable isothermal characteristics without the usual wafer thinning. In addition, the non-thinned wafer results in larger thermal capacitance, allowing for higher repetitive peak surge currents for the same junction temperature within the maximum operating temperature of 175°C.

Abstract: This work presents the design methodology and performance of a compact edge termination structure aiming 10kV+ rated Silicon Carbide (SiC) devices. Standard Floating Field Rings (FFRs) for such high voltage rating SiC devices are not favored because they are inefficient in terms of the achievable breakdown voltage as a percentage of the 1D maximum, consume large chip area, require high implantation energies and small gaps between rings which can violate fabrication limits. We show that the implantation of Aluminium at the bottom of carefully positioned trenches can be analogous to deep Aluminium implantation in terms of performance, thus annulling the need for small gaps between rings and MeV ion implantation. We optimize the distribution of trenches by placing them in multiple zones of different expansion coefficient. The proposed multi expansion ratio Trench FFR termination was utilized to terminate the active area of a 10kV rated Punch Through n-IGBT having 0.8 μm p-body and 100 μm, 3×10¹⁴ cm^-3 drift region. We found the 0.6–0.8 µm to be the most optimum trench depth, achieving over 10 kV within less than 500 μm of termination length.

Abstract: Edge termination is a critical part of a power devices. Numerous edge termination types have been developed for silicon devices. Implementation of these termination architectures are not straightforward in SiC due to physical and processing specificities: lower junction depths, higher electric field, trench depth and shaping limitations, etc. Two main families of terminations are currently used in commercial devices, pure Field Guard Rings, and JTE + Rings combination. The increasing number of trench commercial devices requires new approaches based on etched rings filled with dielectrics or polysilicon. For epitaxied bipolar devices, MESA with bevel angle termination combined with JTE based architecture are also suitable. In any case, and especially regarding avalanche capability requirements, not only the termination architecture is relevant, but also the passivation type, the channel stopper design, the 3D design. As modelling using conventional tools is not fully reliable, specific complementary characterization methods are needed. For instance, micro-OBIC can be very effective to determine the electric field distribution in the periphery of the power devices.

Abstract: Planar Schottky contact and various trench Schottky contacts have been integrated into the edge termination region of a 4H-SiC trench metal-oxide-semiconductor field-effect-transistor (MOSFET). The forward and reverse characteristics of various design splits have been benchmarked to determine the optimum method of the Schottky contact integration. As a result, the trench Schottky diode with Schottky metal contact in both the planar surface and the trench sidewall surface has been able to offer the best performance.

Abstract: A 3.3 kV rated Si-SiC hybrid IGBT with Si-based active structure and Si/SiC composite junction edge termination is proposed in this paper. A single deep and wide Si trench, capped with a hetero-epitaxially grown SiC layer, is employed as the edge termination structure. Therefore, the active region can make full use of the mature Si-based IGBT processes and cell structures with high carrier channel mobility and long electron-hole lifetime. Meanwhile the edge termination benefits from the high critical electric field of SiC and its breakdown voltage can easily reach the ideal value with excellent process windows. The ruggedness and reliability of the device can also be significantly improved because the avalanche occurs inside the silicon bulk and is far from the dielectric/semiconductor interface. The excellent characteristics of the edge termination are studied in detail by simulation. It is shown that the proposed edge structure has higher reliability in terms of the hot carrier effects and much less sensitivity to the interface charges in terms of breakdown degradation.

Abstract: This paper presents the development of 1700V-rated 4H-SiC JBS diodes in the state-of-the-art 6-inch SiC-dedicated foundry, NY-PEMC (New York- Power Electronics Manufacturing Consortium). The critical considerations in developing the SiC JBS diode including the cell optimization, edge termination design, process flow, and unit process developments are discussed in this paper. Static device performances such as forward conduction and reverse blocking behaviors of fabricated 1700V, 20A-rated JBS diode are presented.

Abstract: This paper presents the analysis of Aluminum profile implanted into 4H-SiC with low background doping concentration. A strong lateral straggling effect was discovered with secondary electron potential contrast (SEPC) method, and analyzed by Sentaurus Monto Carlo simulations. The effect of lateral straggling was included in the edge termination design using Sentaurus TCAD simulation tool, and the results are compared with design not including the lateral straggling effect. The effect of interface charge on the electric field distribution and breakdown voltage of different 10 kV device edge termination designs was compared and analyzed.

Abstract: High breakdown voltage and smaller size of edge termination are required in SiC power devices. We simulated reverse bias characteristics of a variety of edge terminations targeting 6.5 kV MOSFET and the FLR showed the best trade-off between the size and the implanted Al dose. Fabricated pn diode TEGs with a FLR demonstrated over 6.5 kV breakdown voltage. We observed the avalanche breakdown visually by light emission and it corresponded to the simulated electric field. These indicate that we can fabricate the desirable FLR for 6.5 kV MOSFET.