Papers by Keyword: Hall Measurement

Abstract: In this study, 4H-SiC bonded substrates (bonded-SiC) with an average resistivity of 2.4–31.5 mΩ·cm were prepared, and attention has been directed toward the relationship between the resistivity of bonded-SiC and the contact resistance at the backside where metal Ti/Ni was applied. A circular transmission line model (cTLM) was used to accurately measure the backside contact resistance. A linear correlation was found between and the resistivity of bonded-SiCs at room temperature (RT). This result indicates the existence of a threshold resistivity at which the specific contact resistance in the range of 2.2 × 10⁻⁶ to 1.5 × 10⁻⁵ Ω·cm² can be achieved without contact annealing; it also indicates that the temperature dependence of between 17.4 and 34.4 mΩ·cm is eliminated. This phenomenon can occur because is dominated by tunneling current above the nitrogen concentration at the threshold resistivity, which is driven by the high nitrogen concentration and sufficient carrier activation in the polycrystalline portion (polycrystalline layer) of bonded-SiCs. These are important properties resulting from a polycrystalline layer with a 3C structure in bonded-SiC.

Abstract: Gated Hall measurements are conducted to calculate interface trap density of a nitric oxide (NO) annealed 4H silicon carbide (4H-SiC) MOSFET. The free carriers are measured using split CV method. Application of body bias confirms that the total trap quantity does not change at the interface when changing the electric field through body bias for a given device. The effect of positive gate stress on Hall mobility is also studied. A stress voltage of +36 V is applied for different stress times (0, 10, 30, 100, and 300 sec). With the increased stress time, the Hall mobility value drops at low gate voltages, while at higher gate voltages they merge. Higher stress creates more interface traps that in turn increase Coulomb scattering which lowers mobility at low gate voltages. The effect of gate stress on Hall mobility provides accurate insight of the channel behavior due to interface traps at 4H-SiC / SiO₂ interface.

Abstract: Bulk mobility and dopant activation of implanted species into 4H-SiC plays a crucial role in the carrier conduction, blocking behavior, and channel properties of a 4H-SiC vertical power MOSFET. Nitrogen and phosphorus ion implantation became the norm as n-type dopants for 4H-SiC. Therefore, the doping and temperature behavior of both species in 4H-SiC needs to be well characterized. In this study, we report a comparison in electrical characteristics between nitrogen and phosphorus implanted 4H-SiC as a function of temperature for various doping levels. For this purpose, 4-point van der Pauw samples are prepared, resistivity and Hall measurements are conducted. We found that resistivities drop as temperature increases from 140 K with phosphorus having higher resistivities at all implanted doping concentrations. The carrier concentrations increase with increase of temperature, indicating incomplete ionization of dopants. Mobilities drop at low temperature due to increased impurity scattering, reaches a peak near 300 K and drops at higher temperature due to increased phonon scattering. From the obtained data, using a two-level charge neutrality equation, the activation percentage and ionization energies of dopants in hexagonal and cubic sites for both species are extracted and compared.

Abstract: We present a calibrated bulk mobility model for 4H-SiC. Hall measurements are performed on 4H-SiC samples to determine the bulk mobility/resistivity in the temperature range of 200-500K. We observe that temperature dependence of bulk resistivity cannot be predicted by popular mobility models available within TCAD tools. A careful investigation reveals that these popular mobility models need to be revised and replaced by a comprehensive model that can describe the impurity scattering effects dominant at low temperatures. We present a well calibrated bulk mobility model for 4H-SiC exhibiting excellent agreement with measured data, making it suitable for device simulation purposes using TCAD tools.

Abstract: High-quality, low resistivity n-type (nitrogen-doped) single crystal 4H-SiC wafers are needed to grow high-quality epitaxial SiC layers used for the active blocking layers of high-voltage power devices. The resistance of the substrate constitutes a portion of the device resistance for vertical devices, and therefore the SiC substrate properties must be fully characterized. In this study we report the 4H-SiC substrate electrical properties as a function of temperature measured using van der Pauw structures to measure resistivity from 4-point measurements, and carrier concentration and mobility from Hall effect measurements. We find that the SiC substrate resistivity has a minimum around 425K for typical substrate doping levels, due to a competition between the decreasing mobility and increasing carrier concentration with increasing temperature. The measured energy levels of the N donor (hexagonal / cubic sites) are extracted for a 5.8×10¹⁸ cm^-3 N-doped substrate, and found to be 15 meV and 105 meV, respectively.

Abstract: The expansion behavior of double Shockley stacking faults (DSFs) was investigated in heavily nitrogen doped 4H-SiC crystals at high temperatures up to 1350°C. An immobilization phenomenon of partials surrounding DSFs was discovered by a thermal annealing at temperatures over 1275°C. The electric properties of SiC crystal were maintained after the partial dislocations were immobilized with a high temperature annealing. The mobile partial dislocations extended straight, but the immobile ones bent toward the glide direction. This immobilization phenomenon is significant and useful for achieving low-resistance SiC substrates without DSFs.

Abstract: A simple and practical method of characterizing traps at SiC/SiO₂ interfaces close to the bottom of the conduction band by using the split C−V and Hall measurements is proposed. This technique was applied to the characterization of traps at a wet-oxidized SiC/SiO₂ interface on C-face and those at an oxynitrided SiC/SiO₂ interface on Si-face. It was shown that the density of traps near the conduction band of the oxynitrided SiC/SiO₂ interface was more than 10 times larger than that of the wet-oxidized SiC/SiO₂ interface.

Abstract: In this study, 4H–SiC inversion layers were experimentally evaluated by Hall and split C–V measurements, and scattering mechanisms related to gate oxide nitridation were analyzed. Three typical samples with different crystal plane directions and gate oxidation conditions were prepared, and their total trap density and Hall mobility were compared. Based on the temperature dependence of the Hall mobility, we found that scattering mechanisms differed for each sample. The sample C-face oxynitride which had a high nitrogen density at the metal–oxide–semiconductor (MOS) interface, showed a similar temperature dependency to that of ionized impurity scattering. This result suggests that high-density nitrogen acts as donors that supply free carriers and cause ionized impurity scattering, just like in a bulk crystal. In addition, the sample C-face wet has lowest influence of the Coulomb scattering because of the lowest temperature dependence of Hall mobility and the lowest total trap density.

Abstract: NO annealed Lateral (11-20) MOSFETs were fabricated and mobility limiting mechanisms were investigated by MOS-gated Hall measurements, impedance analysis of MOS capacitor and so on. We have clarified that about 1×10¹² cm^-2 of inversion electrons are trapped at the interface and mobility is largely limited by Coulombic scattering. We attribute that the Coulombic scattering is caused by electrons trapped at interface states and positive fixed charges, which might be due to donor-like states.

Abstract: This paper compares the performance of 4H-SiC MOS capacitors and MOSFETs made using the conventional NO annealing process and a high-temperature (1400°C) dry oxidation process. Through extensive C-V, G-ω, I-V and Hall measurements, the limitations of both the processes are discussed.