Papers by Keyword: IP

Abstract: Wire Electrical Discharge Machining (WEDM) is a modern machining technique. WEDM is electro-thermal non-conventional machining processes follow to cut very hard materials. WEDM is non-traditional material cutting operation employed to machine complex geometries and shapes. The present paper attempts to study surface and sub-surface variations during WEDM of titanium grade 7 alloy with Brass wire coated with Zn. This paper presents experimental studies with varying three key process parameters viz. pulse ON time (TON), pulse OFF time (TOFF), peak current (IP). The investigation is focused on assessment of material removal rate, surface roughness as well as recast layer. Scanning electron Microscope (SEM) examinations are carried out on surface textures and are discussed in the article. The obtained results indicated that the stretched pulse time discharges more energy causes rough surface finish. The MRR is also strongly influenced by T_ON.

Abstract: Wire electrical discharge machining (WEDM) is a specialized thermal machining process, capable of accurately machining parts with different hardness, complex shapes and sharp edges that are very difficult to be machined by the traditional machining processes. The practical technology of the WEDM process is based on the conventional EDM sparking phenomenon utilizing the widely accepted noncontact technique of material removal.In this paper, the effects of various process parameters of WEDM like pulse on time (T_on), peak current (IP), wire feed (WF) and wire tension (WT) have been investigated to study their impact on wear of wire of ELECTRONICA SPRINTCUT WEDM machine.It is found that the wear is influenced with increase in pulse on time (T_on) and wire tension.

Abstract: —In this paper, we propose a new way to implement the FFT Algorithm, which based on FPGA. At first we introduce the theory of FFT algorithm and its applications. Then the features of FFT IP core based on Altera FPGA is discussed. We elaborate the usage method of the customizable Altera FFT MegaCore function. A logic state machine is designed to create some command signals of this FFT IP core. Finally we use simulation tools Signal-Tap in quartus II inviroment to simulate and debug our FFT control module’s function. The result shows that this new control method of FFT IP core is feasible.

Abstract: For better monitoring of the person's health status, this paper designed and realized a remote health monitoring system. The paper describes design principle of each part of the system. The system is based on wireless body area network. It collected health data using C8051F020 MCU. It transmitted data by Bluetooth and IP networks. The dynamic monitoring results displayed on PC, mobile terminals or remote testing center by GIS map. After testing, the system can accurately capture, transmit and display pulse and body temperature. The test results show that the system is stable, easy to operate.

Abstract: Communications on the Move (COTM) has gained a great deal of attention recently. The need for broadband connectivity from a moving vehicle has increased dramatically in the past few years for both commercial and military applications. This paper will discuss elements and considerations of providing satellite communications on a moving platform from a system perspective. It will focus on Internet Protocol (IP) over satellite since IP has become the dominant protocol for newly deployed voice and video applications. A global COMT network has much great degree of complexity than a regional network since it will require beam switchover and IP routing re-convergence as a vehicle moves from one satellite beam to another. This paper will present some approaches to COTM system design including antenna size and link budget, spectral density, the Doppler effect, beam and teleport switchover.

Abstract: The SoC design is a tendency which the navigation and positioning receiver circuit design, its key technologies, including bus architecture technology, IP core design and multiplexing, in which the correlator IP core design and reuse is crucial for navigation and positioning receiver. This paper describes the operating principles and structures of the SoC bus architecture and navigation-positioning correlator, and the various modules of the correlator and the Galileo/GPS navigation signal are analyzed; On this basis, to design Galileo/GPS dual-mode correlator IP core using SoC-based IP core design method, and to simulate and analyse, it can be easily applied to the navigation and positioning receiver baseband SoC design.

Abstract: IP Multimedia Subsystem IMS is the core technology of next generation networks can provide real-time IP multimedia services and VoIP services through IMS, but IMS is not perfect, of which there are still some problems. IMS in real-time business a higher demand for mobility support, voice and video data usually use real-time transport protocol RTP to transfer user data protocol over UDP, requiring low transmission delay, seamless switching, as well as higher bandwidth utilization. In this paper, the IMS-related issues, the IMS network protocol.The SIP protocol simulation. Simulation results show that more of the nodes, the network send and receive packets faster, the results of this paper is the study of the IMS network, the actual reference value

Abstract: The development of satellite communication technology has brought the Vehicle tracking systems to the day-to-day life of the common man. Today GPS fitted cars, ambulances, fleets and police vehicles are common on the roads. All the existing technology can support only tracking the vehicle place and status. No such systems have implemented emergency alert during accidents, using smart phone. Real time vehicular tracking system incorporates a hardware device installed in the vehicle and a remote Tracking server. The information is transmitted to Tracking server using GSM/GPRS modem on GSM network by using SMS or using direct TCP/IP connection with Tracking server through GPRS. Tracking server also has GSM/GPRS modem that receives vehicle location information via GSM network and stores all this information in computer database. This information is available to authorized users of the system via website over the internet.The embedded device fitted with “sensors”. The sensors used are to provide Automated Emergency Alert in case of accident (Inform nearby Police, Hospital and Owner through SMS), Identification of Halts and Duration, Emergency Message Display in Centralized computer, Automatic update of Emergency number, Fuel Tank Pilferage Monitoring and Distance and Speed computation. The data from the sensors are transferred to centralized server through GSM enabled device. GPS device is used to track the vehicle locations in latitude and longitude. The GPS device is received raw satellites data in this data is not understandable first we convert raw data to digital form and transmitted to centralize computer. Each licence vehicle owner can access the data using web service and can retrieve all the real time data and stored previous data in database. Because whole Proposed system control in a single chip so proposed system allows for the stability, equilibrium, less resource use and sustainability of a tracking system and save of the people life.

Abstract: System on a programmable chip is designed for the development of embedded system．By embedding a micro_ processor in FPGA．SOPC not only takes the advantage of micro-processor system which is rich in software and hardware resource．it also is a part of FPGA system which has fast logic．So SOPC is considered to be the direction of the future in embedded filed. Meanwhile．This thesis has interpreted the application of SOPC in the monitoring system, and tries to find the advantage and features of the SOPC system by practical designs.