Papers by Keyword: Interconnects

Abstract: We demonstrate that a uniform recess of polycrystalline Mo can be achieved using a two-step method: metal oxidation with isotropic oxygen plasma that forms a layer of MoO₃ and selective etching of this oxide layer. The oxidation step fully defines the recess depth, and its uniformity is ensured by the low facet dependence of plasma oxidation. We have extensively studied the oxidation of patterned Mo nanowires (30 nm width) in isotropic oxygen plasma and achieved uniform oxide layers of predefined thickness by controlling radio-frequency (RF) power, gas pressure, and exposure time. We showed that using highly selective oxide etching, we can perform multiple etching cycles with a typical etch rate of 1-2 nm per cycle, depending on the RF power. Due to plasma isotropy, this approach can be implemented for a controlled uniform etching of large vertical stacks of metal nanostructures.

Abstract: We achieved the controlled recess of molybdenum (Mo), which is alternative interconnect material for copper (Cu), by wet chemical etching. This wet etching process includes two main steps which are chemical oxidation of Mo and its subsequent dissolution, respectively. Firstly, Mo nanowires (NWs) are uniformly oxidized with potassium permanganate (KMnO₄) solution in acetone. Secondly, the Mo oxide is dissolved using an aqueous solution of HCl. Mo NWs are characterized through transmission electron microscopy (TEM) imaging after each of the above steps. Cyclic etching experiments including oxidation and dissolution of Mo showed that Mo recess is linear and can be controlled for each cycle, where the etching produced the smooth Mo surface. This controlled Mo recess is crucial for the fabrication of next-generation metal interconnects.

Abstract: In this work the wet etching of molybdenum thin films was investigated for applications requiring controlled recess without roughening or pattern loading. First, continuous etching of Mo in alkaline and oxidative peroxide solutions was studied. Then, additives like glycine and diethylenetriamine were used and their effect on etch rate and roughness was assessed. Finally, we evaluated if the requirements for a stepwise etching approach for Mo recess using peroxide or ozonated water as the oxidizing step and ammonia as the oxide dissolution agent were met.

Abstract: Carbon nanotube (CNT) interconnects are emerging as the ultimate choice for next generation ultra large scale integrated (ULSI) circuits. Significant progress in precise growth of aligned CNTs and integration of multiwalled CNT interconnects into a test chip make them promising candidates for future nanoelectronic chips. Tremendous research efforts were made on silicon based ultra-low-k dielectrics for Cu interconnects, but, the most recent advancements in polymer based composites as dielectric materials open up fresh challenges in the use of low-k dielectrics for CNT interconnects. This paper reviews the emerging polymer composites like Boron Nitride Nanotubes, Graphene/Polyimide composites, Metal Organic Frameworks and small diameter CNTs. Many reviews are already exists on the synthesis, fabrication, dielectric, mechanical, chemical and thermal properties of these materials. In this review, we have explained the specific properties of these materials and the necessities for integrating them into CNT interconnects to meet the requirements of future IC designers.Keywords: low-k dielectric materials, ultra low-k dielectrics, carbon nanotubes, interconnects, dielectric constant,

Abstract: This paper presents single walled carbon nanotube (SWCNT) interconnects with air as dielectric medium. We treat CNT interconnects as a discrete (fractal) media for the first time where continuum based differential equations fail to capture the physics at nanoscale and hence, we use discrete partial differential equations in this work. We have analyzed the effect of air gaps (AG) on performance factors like temperature dependent resistance R(T) of CNTs and hence the R(T)C delay of the interconnects. We have first calculated the temperature coefficient of resistance (TCR) of CNTs and analyzed the trend of changing resistance at different ambient temperatures. The R(T)C delay shows that CNT/AG interconnects can operate satisfactorily up to 500K. We then compare the R(T)C delay with ITRS predictions from 17nm to 8nm technology nodes. We have also calculated the chip area used by CNT/air-gap interconnects and found that they take up to 83% lesser area than the conventional Cu/low-k interconnects.

Abstract: For patterned TiN/silicon oxide/low-k dielectric stack, fluorinated etch residues were detected on the TiN surface, the dielectric sidewall and bottom, regardless of the low-k material used in the stack. XPS results showed that they consisted of polymer-based (CFx) residues deposited on trench sidewall and bottom, and metal-based (TiFx) residues mainly deposited on top surface. In terms of post-etch residue removal, the efficiency of various wet clean solutions can be clearly distinguished for CFx, and TiFx using the same patterned porous low-k stack. These results also demonstrate that the removal of both TiFx and CFx residues generated during the plasma is possible in one step with optimized chemical and process.

Abstract: In the BEOL, as interconnect dimensions shrink and novel materials are used, it has become increasingly difficult for traditional PERR removal chemicals to meet the evolving material compatibility requirements. As a result, formulated cleans that specifically target these unique challenges are required. Two formulated BEOL cleans were evaluated on blanket and patterned wafer coupons for their ability to wet etch titanium nitride (TiN) and clean post-plasma etch residue, while remaining compatible to interconnect metals (Cu and W) and low-k dielectric (k = 2.4). Both, showed an improvement in material compatibility relative to dilute HF, while simultaneously being able to remove the TiN hardmask and post-etch residue, leading > 90% yield on test structures of varying sizes.

Abstract: Periodic mesoporous organosilica film was prepared via sol-gel and spin-coating methods using a 1, 2-bis (triethoxysilyl) ethane (BTEE) and a poly (ethylene oxide)-poly (propylene oxide)-poly (ethylene oxide) triblock copolymer template (P123). Thermal treatment at 350°C for 1h resulted in the formation of ultralow dielectric constant (k) film with a k value of 1.82, a leakage current density of 1.58×10^-9 A/cm² at 0.5MV/cm, Youngs modulus of 6.45 GPa, and hardness of 0.58 GPa. Further, thermal treatment at higher temperature up to 500°C still achieves an ultralow k value smaller than 2.0, similar leakage current characteristics, and enhanced mechanical properties. These indicate that synthesized PMO film has robust thermal stability, and very good potential for the application of next-generation inter-level dielectrics.