Papers by Keyword: Interface Charges

Abstract: In this paper the interface trap densities (D_it) are analyzed for ultra thin dielectric material based metal oxide semiconductor (MOS) devices using high-k dielectric material Al₂O_3. The D_it have been calculated by a novel approach using conductance method and it indicates that by reducing the thickness of the oxide, the D_it increases and similar increase is also found by replacing SiO₂ with Al₂O₃. For the same oxide thickness SiO₂ has the lowest D_it and found to be the order of 10¹¹ cm^-2eV^-1. The D_it is found to be in good agreement with published fabrication results at p-type doping level of 1 × 10¹⁷ cm^-3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

Abstract: Breakdown characteristics of 4H-SiC PiN diodes with various JTE structures have been investigated. By combining two-zone JTE and Space-Modulated JTE (SM-JTE), a breakdown voltage over 15 kV, corresponding to about 93 % of the parallel-plane breakdown voltage, was realized. The window of optimum JTE dose to obtain high breakdown voltage was widened, which indicates the robustness to the deviation of JTE dose. By comparing the breakdown voltage obtained by simulation and experimental results, impacts of the charge near the SiO₂/SiC interface are discussed.

Abstract: High temperature C-V characterization with and without UV illumination has been performed on n-type 4H-SiC MOS capacitors fabricated using different processing conditions to extract various types of interfacial charges. An anomalous positive flatband voltage shift with temperature has been observed in most of the SiC MOS capacitors measured. We have experimentally identified an extra type of fixed charges at the 4H-SiC/SiO2 interface from the temperature dependence of the flatband voltage, particularly under UV illumination.

Abstract: Dielectric charges and charge stability were compared in different dielectrics formed on SiC by different processing techniques. The concentration and transient behavior of the interface and trapped charges were investigated. Strong hysteresis and flat-band voltage drift under applied bias were observed in some of the samples. They are attributed to the trapping of the charge injected in the dielectrics. Differences in charge injection, charge trapping, and capture/emission of carriers by interface traps were pronounced for the investigated SiO2 and Si3N4 dielectrics.