Papers by Keyword: Interface Trap

Abstract: Current power MOSFET devices on Silicon Carbide show a limited inversion channel mobility, which can be a result of the expected very high density of interface states near the conduction band . In the current work, the effect of the post implantation annealing temperature, the thermal oxidation and the nitrogen doping of the n-epi layer on the density of these interface traps is investigated using capacity-conductance measurements. Instead of the usage of very high frequencies as used in , in this investigation the measurements were performed in liquid nitrogen to decrease the recharging times of the interface traps.Due to the different processing the samples showed a wide spreading of the inversion channel mobility. The conductance measurements show a characteristic peak caused by the conduction band near interface traps especially for the low temperature measurements. But these traps could not be correlated to the mobility. Instead, a correlation to the nitrogen doping of the epi layer could be observed.

Abstract: Ion implantation in silicon carbide (SiC) induces defects during the process. Implantation free processing can eliminate these problems. The junction termination extension (JTE) can also be formed without ion implantation in SiC bipolar junction transistor (BJT) using a well-controlled etching into the epitaxial base layer. The fixed charges at the SiC/SiO₂ interface modify the effective dose of the JTEs, leakage current, and breakdown voltage. In this paper the influence of fixed charges (positive and negative) and also interface trap density at the SiC/SiO₂ interface on the breakdown voltage in 4.5 kV 4H-SiC non-ion implanted BJT have been simulated. SiO₂ as a surface passivation layer including interface traps and fixed charges has been considered in the analysis. Simulation result shows that the fixed charges influence the breakdown voltage significantly more than the interface traps. It also shows that the positive fixed charges reduce the breakdown voltage more than the negative fixed charges. The combination of interface traps and fixed charges must be considered when optimizing the breakdown voltage.

Abstract: A systematic study on the 3C-SiC/SiO₂ interface has been done. 3C-SiC epilayers have been grown on a Si (001) substrate. Results obtained from room temperature conductance-voltage (G-V) and hi-low capacitance-voltage (C-V) on n-type 3C-SiC/SiO₂ metal-oxide-semiconductor capacitors (MOS-Cs) have been reported using various types of oxides. The oxides used in these studies have been thermally grown at different oxidation temperatures - 1200°C, 1300°C and 1400°C. Also, the interface trap density (D_it) of as-grown MOS-C is compared with nitrided (thermally grown oxide + N₂O post-oxidation annealing) oxides. Oxide grown at 1300°C followed by N₂O-passivation at the same temperature gives the lowest D_it of 6x10¹¹ cm^-2eV^-1 at 0.2eV from the conduction band (CB) edge.

Abstract: The effect of the alternative nitridation process of the 4H-SiC/SiO₂ interface by introduction of a thin silicon nitride layer on the electrical properties of the gate oxide has been investigated. C-V and G-V measurements on inversion-channel MOS devices revealed similar results to the conventional N₂O oxidation. Higher field-effect mobility values are achieved due to lower interface roughness of the alternative nitridation process. However, insignificant degradation of the reliability was observed.

Abstract: The effect of bulk potential engineering on the transport properties in the channel of SiC MOSFETs has been studied. For this purpose, n-channel SiC MOSFETs have been manufactured with different background doping concentrations and characterized electrically at room temperature by current-voltage as well as by Hall-effect measurements. To interpret the measurements performed, numerical simulations have been carried out using Sentaurus Device of Synopsys. The main finding of the simulation analysis is that the change in the depth of the band-bending has to be considered to explain the doping dependence of SiC MOSFET characteristics.

Abstract: This paper presents how to improve specific o n-state resistance (Ron) induced by the HCI of a SOI LDMOS device. In manufacturing of UHV device, trade-off between on state resistance and breakdown voltage is always present. But with our process design we are able to improve Ron degradation without compromising the-breakdown voltage. In our design the peak electric field is under gate near source side, due to low electric field near drain helps to increase the current flow much better hence it helps to improve Ron and Vth. If the peak field is located near drain side, the hot holes is easy to penetrate to field oxide and avoid current flow then it causes increase in the Ron.Our simulation results shows 0.27% and 0.95% Ron and Vth increases respectively even at 1e5 second stress time .The Ron degradation phenomenon was analyzed with the 2-D simulation of electric field and impact ionization generation.

Abstract: The technique for low dose rate response prediction, based on the combination of low, room and elevated temperature irradiation was described. The possibility of using Test Method 1019.8 for space applications was considered.

Abstract: The physical model, procedure of fitting parameter extraction and experimental study of the contribution of radiation induced charge neutralization (RICN) effect on enhanced low dose rate sensitivity (ELDRS) of bipolar devices are presented.

Abstract: Ionizing radiation impact leads to degradation of electrical parameters of microelectronic devices. It is necessary to take this fact to account when dealing with microcircuits for space applications and high energy physics. Main physical reason of radiation-induced failures of spaceship and front end electronic equipment is buidup of interface traps at Si-SiO₂ interface in semiconductor transistor structures. The original mechanism of interface trap annealing based on radiation induced charge neutralization (RICN) effect is presented. It is supposed that the positive charge of trapped holes in oxide is transformed through electron capture into a new defect (the AD center). The AD centers act as interface traps. The appearance of the A^–D⁺ state leads to the annihilation of the AD center or annealing of interface trap. The annihilation process can be stimulated by radiation induced or substrate electrons. The competitive between accumulation and annihilation processes leads to saturation of the interface trap buildup. The value of density of interface trap in saturation depends on product of interface trap accumulation rate (K_acc)_it and constant K_AD which is function of thermal velocity, capture cross-section of AD center, generation rate and electron yield of radiation induced electrons. The extraction of these parameters allows explaining a known experimental data. The alternative mechanism of the interface trap saturation connected with the exhaustion of initial interface trap precursors is considered.

Abstract: 4H-SiC(000-1) C-face was oxidized in H₂O and H₂ mixture gas (H₂ rich wet ambient) for the first time. H₂ rich wet ambient was formed by the catalytic water vapor generator (WVG) system, where the catalytic action instantaneously enhances the reactivity between H₂ and O₂ to produce H₂O. The dependence of SiC oxidation rate on the H₂O partial pressure was investigated. We fabricated 4H-SiC C-face MOS capacitor and MOSFET by the H₂ rich wet re-oxidation following the dry O₂ oxidation. The density of interface traps was reduced and the channel mobility was improved in comparison with the conventional O₂ rich wet oxidation.