Papers by Keyword: LVDS

Abstract: The FPGA platform is a developing area in the industry applications. With continuous advancement in science and technology, the image quality has entered an era of full-HD. Its resolution reaches 1920x1080 pixels, and its refresh rate comes to 60 fps (Frames Per Second). Taking the 1920x1080 P, 60 fps image sensor as an example, the eye diagram efficacy at both the image input end and the output end were measured. When the input signal was LVDS, the standard value of the eye width and height was 1.092 ns and 100mV respectively. The measured value was 1.297 ns and 149 mV respectively, which are 18% and 49% better than the standard value, respectively. When the output signal was HDMI, the standard [1] of the eye diagram was 424 ps and 400 mV respectively. The measured value was about 540 ps and 600 mV respectively, which are 27% and 50% better than the standard value, respectively. The results of measurement of the electrical characteristics of the system above show that our high-resolution image processing system platform has high reliability.

Abstract: A High-Speed LVDS Data Acquisition system is designed, with XILINX’s Virtex-5 FPGA as core processor as well as TI’s TMS320C6748 DSP for pre-processing and storing data. This system achieved a greater amount of image processing and faster image processing requirement. The system completed the dual LVDS image data acquisition according to the demand. The resolution of the image data is 320x257. Each image transmission frame rate of not less than 150 / sec. large amount of data throughout the system as well as real-time demanding is a big challenge for designer. The designer uses simulation tools from Mentor Graphics Hyperlynx to complete the stack and impedance calculation and signal quality simulation to ensure that the system is stable and reliable. This system also has better scalability and more reliable storage method than past designs. Recently, the system has completed testing verification and results show that this design is feasible and reliable.

Abstract: As demand for data rate continues to increase, new problem of LVDS start to come out, such as signal integrity. Those problems are primarily caused by frequency-dependent loss in transmission line. The purpose of pre-emphasis is to apply intentional overdriving to the signal and get it back to the original signal with the proper weight, thereby compensating for the ISI from the nearby data symbol. In order to avoid over-emphasis we propose a programmable pre-emphasis adapting to different situation, and finish the prototype which can improve the transmission bandwidth more effectively, achieving high-speed data transmission.

Abstract: This paper introduces a data transmission circuit used to transmit signals over thousands of meters in borehole; meanwhile, a control system that is equipped with the circuit is also presented here. This set of equipment has many advantages over previous systems-smaller size, less cost, longer communication distance and friendlier user interface. The design of hardware in the system consists of LVDS transceiver circuit, USB port circuit based on high speed MCU C8051F321, automatic power-on circuit based on relay TQ201 and acquisition circuit based on 24-bit analog-to-digital converter LTC2492. The software is based on both C language and VC++6.0. Finally, it accomplishes a kind of data transmission circuit and control system in borehole which delivers the data from thousands of meters away.

Abstract: In this paper, based on the FPGA and with a PAL decoder chip, LVDS coding chip and large capacity SRAM, the design and implementation of a PAL system for analog signals to the LVDS conversion of the video signal interface board. First of all, convert the analog signal of PAL to RGB565 digital video signal, and transform the interlaced scan into progressive scan. Then, through the frame rate conversion, resolution expansion etc. algorithm method to handle. Finally, to achieve the interlaced scanning, a resolution of 720×576, 25Hz PAL analog video signal, is converted to a progressive scan, a resolution of 1024×768, 60Hz LVDS video signal transmission. After the measurement, the resolution and frame rate of the video signal conversion interface board are all meet the design requirements. It has been verified the effectiveness of scheme.

Abstract: Due to the characteristics of the large amount of data and the high rate of transmission in the system of remote image acquisition, introduces a remote image storage memory based on the LVDS. The FPGA design as the core, and adopting the LVDS interface solution string and the drive chip combined, ensure the effective of receiving remote data. Meanwhile the system adopted the flash programming technology of alternative two-plane to storage the image data. It realized the speed of 28.95 MB/s high-speed real-time image data storage requirements in system. The application shows that the data memory stable and reliable, meets the practical requirements

Abstract: This paper mainly introduces a FPGA-based data acquisition system which is designed to acquire multi-channel analog signal and one channel digital signal. Analog data and digital data are stored into a FLASH memory in a mixed frame format. When the acquisition finished, the data in the FLASH was read out via the LVDS communication interface to a data-read device, and the host computer receives the data through the USB bus, so the subsequent data processing and analysis can be accomplished and the information we needed can be got. The design is applied successfully to a remote measurement system, and the data acquired is reliable and precise.

Abstract: In this paper, based on the FPGA and with a video dedicated A / D converter chip, LVDS coding chip, the design and implementation of a SD(standard-definition) analog video signals to HD(high-definition) digital video signal converter. First, input SD analog video into digital video signals meet the ITU-BT656 standard. Then use the FPGA with the video processing chip and DDR do some corresponding processing to achieve high-definition digital video output. After the actual test, the converter output signal of the image quality is well, meets the design requirements, and to verify the effectiveness of the program.

Abstract: This paper presents a design of data transmission platform based on LVDS and FPGA technology. It is used for data transmission in Audio and Video teaching system, and we provide 64 terminals. The platform mainly contains two parts, multimedia data transmission card and network switch which are connected by LVDS serializer-deserializer. We use FPGA as the core chips to control data transfer.

Abstract: Aiming at the LVDS high speed data communication used on long distance, this paper designed the method of data reading and status monitoring of the recorder during the experiment. The transferring cables are twisted-pair, its transferring distance is 100m and the data transmission speed is 12Mbytes/s. With the method introduced in this paper, great deal of time is saved during the data retrieving process. It also increases the efficiency of the experiment, even better, the transmission medium is cheaper, more simply, and easier to be achieved than the optical fiber and coaxial cables.