Papers by Keyword: Memory

Abstract: In this work, we fabricated ZrO₂ based resistive random access memory by sol-gel spin coating technique and investigated its structural, optical and resistive switching properties. The X-ray diffraction pattern revealed that 400 °C annealed ZrO₂ thin film has tetragonal structure. The optical band gap value of ZrO₂ thin film obtained was 5.51 eV. The resistive switching behaviour of W/ZrO₂/ITO capacitor like structure was studied. It was found that no initial electroforming process required for the device. The fabricated devices show a self-compliance bipolar resistive switching behaviour and have high on off ratio (>10²). Our result suggests that solution processed ZrO₂ has great potential to develop transparent and flexible resistive random access memory devices.

Abstract: The increasing demand for electronics in harsh environment applications has inspired investigation of silicon carbide (SiC)-based devices and circuits, due to its superior electrical properties. Several researchers have demonstrated the viability of 4H-SiC control circuitry by developing small scale logic circuits entirely in 4H-SiC. However, development and design of memory elements, which is a critical component in any electronic system, is still not fully explored. To bridge this gap, this paper presents, a complete bipolar, static random access memory (SRAM) column that includes the memory cell and the peripheral circuitry, designed to exploit the unique properties of SiC. Simulation results for the proposed memory show stable operation across a wide range of temperatures (27 °C – 500 °C) with good noise margins and access speeds while running at a supply voltage as low as 5 V. This work validates the potential of developing memory architectures in 4H-SiC, paving the way for realizing small-sized digital systems for harsh environments.

Abstract: This work proposes a technique for optimizing data placement of application-wide reused data so that it resides in scratchpad memory of processing elements in multiprocessor system on chips. The proposed technique identifies data elements with fine granularity that can profitably be placed in the scratchpad memories to maximize performance and energy gains. We present a heuristic approach that efficiently exploits the scratchpad memories using memory access footprint. Our experimental results indicate that our approach is able to reduce energy consumption by 30% over cache based memory subsystems.

Abstract: Microcontrollers are widely used in industrial world, and almost all kind of devices were based on microcontroller to achieve high flexibility and abilities. All microcontrollers have nonvolatile and volatile memories to execute the software. During the running, microcontroller calculates many variables and records them to any non-volatile memory to use later. After re-energizing, microcontroller takes the data calculated before the power off and executes the program. In case of any electrical writing error or any power loss during the writing procedure, un-written memory blocks or any un-written data leads to malfunctions. Proposed method uses a gray code based signed two memory blocks to secure the memory reserved for data. Microcontroller uses these memory blocks in alternately. Even if microcontroller has no any real-time ability, gray code provides a guarantee which block is written in last. For every re-starting microcontroller dos not lose the data. In case of any reading problem during the starting, microcontroller has two chances to decide the action. One is to start with default values and the other is to start with the previous data. This study is tested at elevator applications not to lose position and vital values.

Abstract: Vascular dementia (VD) is the cognitive impairment clinical syndrome caused by various cerebrovascular diseases. At present the exact causes of VD are not clear, it is believed that ischemic cerebral vascular disease is one of the factors. Hypertension, hyperlipidemia, diabetes, tobacco and alcohol addiction are risk factors of VD. Most of them can be traced back to the youth. Curcumin has a neuroprotective effect in Alzheimer’s disease (AD) and other neurodegenerative diseases. But the effect of curcumin on brain injury caused by chronic cerebral hypoperfusion was unclear. In this study, chronic cerebral ischemia model was used to investigate the effect of curcumin on learning and memory ability of young and aged rats and to explore the mechanism of neuroprotective effect of Curcumin. The result showed that Curcumin can reduce the brain damage both in young and aged VD rats and improve learning and memory ability, and the effect was dose-dependent, without age difference. The pathological injury of the hippocampus might be one of the mechanisms of curcumin improving cognitive impairment of VD rats.

Abstract: This study focused on the improvement of Schisandra polysaccharide on the learning and memory in D-galactose-induced brain aging mice, to lay the foundation for the prevention and treatment of brain aging and related diseases. D-galactose was used to establish a mice brain aging model, Morris water maze and passive avoidance test were used to observe effects of Schisandra polysaccharide on the learning and memory ability of D- galactose-induced brain aging mice. The results showed that Schisandra polysaccharide could prolong the time of target qundrant, increase the number to cross the original platform in the Morris water maze test, and prolong the latency and reduce the number of errors of mice in the passive avoidance test. It is believed that Schisandra polysaccharide could improve the learning and memory ability of mice with brain aging.

Abstract: The paper discusses the basic data types that defined in C and analysis the forms of data storage in memory. Some examples demonstrate how to store data in memory and how to output the different types data by using formatted output character.

Abstract: College English learning now has attracted a great deal of attention, but many non-English majors students have major problems in terms of English learning, and how to improve the non-English majors' autonomous learning efficiency is the problem that the majority of English educators can not ignore. Through a college non-English major students' English learning science test survey, usual English learning and English language proficiency scores for tracking and monitoring, and data for scientific analysis, and monitoring results, this article indicates that by increasing the non-English majors' autonomous learning teaching mode, the students' efficiency and academic performance have improved significantly. From subsequent cognitive satisfaction survey for self-acceptance, this teaching mode's performance is quite satisfactory.

Abstract: We assessed the effectiveness and mechanism of action of Pecan oil on learning and memory and NF-κB levels in the hippocampus of rats after Morris water maze (MWM test). Pecan oil (200,400 or 800 mg/kg/d) were administered by intragavage once daily for 14 consecutive days. The Morris water maze test was used to evaluate the ability of Pecan oil to increase learning and memory impairment. The levels of NF-κB in hippocampus of rats were detected by Westernblot after MWM test. Compared to untreated controls (P<0.01), MWM could be prolonged after Pecan oil treatment (P<0.05 for low and intermediate dose groups). Westernblot analysis showed that the protein expression of NF-κB was decreased in different concentration Pecan oil(P<0.05 and P<0.01, respectively). The results suggest that Pecan oil is effective in improving the learning and memory in rats, the mechanism of which may be related NF-κB expression decreasing.

Abstract: An error correcting method of BCH code applicable to memory is proposed. The reliability and yield of memories can be efficiently improved by error correcting codes. Due to the limited length of data transfer bits in certain interfaces, check bits are not fully used by most BCH codes. The proposed method takes advantage of the nature of BCH codes to make full use of the check bits, so that more errors can be corrected than the original method. The algorithm can be achieved by pure logic circuits in a parallel way with only gate delay, suitable for special timing applications. The improvement of certain BCH code is evaluated by C++ and the hardware implementation is presented by FPGA.