Papers by Keyword: Minority Carrier Lifetime

Abstract: This work explores the role of implantation depth in suppressing bipolar degradation of 4H-SiC PiN diodes through proton implantation. Targeting depths aligned with active basal plane dislocations (BPDs) effectively reduces stacking-fault expansion, as confirmed by electroluminescence imaging [1,2]. From these observations, we quantified the effective range of suppression in both depth and safe operating current density. Room-temperature proton implantation (170keV, 1×10¹⁶ cm^-2) into the buffer reduced forward-voltage drift ΔV_F by 97% at 600A/cm². The implanted diode extended the safe operating current range to 1300A/cm², ~200A/cm² higher than the reference, confirming effective suppression of bipolar degradation. Once the suppression barrier, defined as a critical excess hole density threshold, was exceeded, the proton-implanted diode exhibited explosive basal plane dislocation activity, leading to the formation of multiple bar-shaped stacking faults. These active BPDs are located deeper than the proton-implant tail, at a depth of around 11.4µm; however, the threshold hole density required for their activation remains approximately the same (~ 4×10¹⁶ cm^-3) [3].

Abstract: In this paper, a method for suppressing bipolar degradation through proton implantation was investigated. Previous work suggests implantation applied to the full thickness of the epi layer, which results in unwanted defects leading to a deterioration in performance. In this work, proton implantation to the buffer layer was successful in reducing the forward-voltage drift ΔV_F of the fabricated SiC PiN diode by 85% at a current density of 800A/cm², when applying room temperature (RT) proton irradiation at a dose of 1×10¹⁶ cm^-2. Irradiation solely to the buffer layer keeps the deterioration of forward current performance to a minimum, while the fabricated SiC PiN diodes are more robust against bipolar degradation at higher current density. In addition, RT proton irradiated PiN diodes show full recovery from their bipolar degraded characteristics within 2.5 h of annealing at 350 °C under vacuum. This indicates proton irradiation alters the crystal structure for the stacking fault (SF) to “shrink” back with ease to their initial basal plane dislocations (BPD) state.

Abstract: We use two different methods to fabricate nanostructured silicon on the surface of C-Si: femtosecond laser etching (FLE) and deep reactive ion etching (DRIE) combined with plasma immersion ion implantation (PIII). Nanocone silicon arrays of dense and random distribution are obtained by FLE. Meanwhile, cylindroid silicon nanostructures of excellent regularity and uniform coverage are achieved by DRIE. These nanostructured silicon materials show a remarkable enhancement on absorptance at near-infrared wavelength. Moreover, the minority carriers lifetime measurement is also carried out to evaluate defect states caused by two etching processes and their influence on semiconductor physical effects. A Si-PIN photoelectronic detector with nanostructured silicon at the back surface exhibits high near-infrared responsivity. These novel results may have a potential application in near-infrared photoelectronic devices.

Abstract: The development of bipolar 4H-SiC devices for high blocking voltages requires the growth of high carrier lifetime epitaxial layers with low Z_1/2 concentrations. This paper shows a comprehensive investigation of the influence of epitaxial growth parameters (C/Si ratio and growth temperature) on Z_1/2 concentration and minority carrier lifetime. On the basis of a discovered exponential correlation of Z_1/2 with the C/Si ratio and growth temperature, a competitive low Z_1/2 concentration of 1.9∙10¹² cm^-3 could be achieved by lowering the growth temperature and switching to higher C/Si ratio. Thermodynamic considerations by an Arrhenius approach reveal a dependency of the formation enthalpy of Z_1/2 on the thermal process and process conditions of the epitaxial growth. Furthermore, the correlation between Z_1/2 and the effective minority carrier lifetime confirms the occurrence of a necessary second recombination mechanism beside the common recombination at deep levels by Shockley-Read-Hall for low Z_1/2 concentration.

Abstract: Application of highly N-doped buffer layers or a (N+B)-doped buffer layer to PiN diodes to suppress the expansion of Shockley stacking faults (SSFs) from the epilayer/substrate interface was studied. These buffer layers showed very short minority carrier lifetimes of 30–200 ns at 250°C. The PiN diodes were fabricated with buffer layers of various thicknesses and were then tested under high current injection conditions of 600A/cm². The thicker buffer layers with shorter minority carrier lifetimes demonstrated the suppression of SSFs expansion and thus that of diode degradation.

Abstract: The multicrystalline silicon wafers purified by directional solidification route were used to introduce copper impurities. The resistivity and minority carrier lifetime of multicrystalline silicon wafers were investigated by four-point probe resistivity tester and μ-PCD, respectively. Annealing temperature, atmosphere and cooling rate were researched. It was found that copper contaminants have a greater impact on the electrical properties of multicrystalline silicon. Research results showed that copper impurities tend to exist at defect sites at high temperature, and high annealing temperature, argon atmosphere and slow cooling conditions make more impact on the electrical properties of multicrystalline silicon than low annealing temperature, air atmosphere and fast cooling.

Abstract: Silicon solar cells are the dominating technology in photovoltaics (PV) industry and have a market share of more than 85% of the modules produced for roof top installations.

Abstract: Surface passivation of c-Si by a-Si:H thin films has been studied. In this paper, the minority carrier lifetime of 345μs (from 85μs) is obtained at optimal hydrogen flow rate (8.0sccm) by using RF-magnetron sputtering method.

Abstract: The aim of this work is to study the low temperature annealing effect on the electrical properties of p-type multicrystalline silicon grown by Heat Exchanger Method (HEM).The minority carrier lifetime variation, the transition metal elements behavior, the sheet resistivity and the interstitial oxygen concentration after different temperatures annealing under N₂ ambient were investigated using quasi-steady state photoconductance technique (QSSPC), secondary ion mass spectroscopy (SIMS), four-probe measurement and Fourier transform infrared spectrometer (FTIR), respectively. The obtained results indicate in the temperature range of 300°C to 700°C that the effective lifetime increases and reaches its maximum values of 28 μs at 500 °C and decreasing to 6 μs at 700 °C. This amelioration is due probably to metallic impurities internal gettering in the extended defects and in the oxygen precipitates as observed on SIMS profiles and the FTIR spectra. From 300 °C to 500 °C the sheet resistivity values rest unchanged at 30 Ω.cm^-2 and rises significantly to reach 45 Ω.cm^-2 for T> 500 °C.

Abstract: The rear surface of multi-silicon has been passivated by Atomic Layer Deposition (ALD) Al₂O₃ and Plasma Enhanced Chemical Vapor Deposition (PECVD) SiNx. The results of the effective lifetime of the silicon before and after firing show that the thickness of Al₂O₃ thin films has a significant effect on the passivation quality. The effective lifetime of the silicon can reach up to 40.64μs and show a better passvation quality when the thickness of Al₂O₃ film is 18nm. Moreover, the impact of spacing of the laser opening-line contact on open-circuit voltage and fill-factor has been furthermore investigated. The cells have a better performance when the spacing of the opening-line is 1.2mm. The result of the local topography of the opening-line contact tested by Scanning Electron Microscopy (SEM) shows that the existing of the void in the interface between Al and Si is the main reason for the bad performance of the cells.