Papers by Keyword: Misfit Stress

Abstract: Thermal annealing experiments were performed to determine the critical conditions of misfit dislocation formation in 4H-SiC epilayers in a temperature range of 1400-1800 °C. Misfit dislocations were observed to form at a given annealing temperature if the temperature gradient across the epi-wafer exceeded a critical value. It was also found that two types of interfacial dislocations could form under different stress conditions. Their formation mechanisms are discussed.