Papers by Keyword: Modulator

Abstract: This study presents a novel contribution to the research of graphene-based electro-optic modulators. In this paper, we numerically demonstrate an ultra-compact and efficient graphene modulator based on metal-nanoribbon integrated hybrid plasmonic waveguide. Benefiting from the good in-plane mode polarization matching and strong hybrid surface plasmon polariton and grapheme interaction, the 10 μm-length modulator can achieve good modulation performance with a wide modulation bandwidth of 41.3 GHz and a low energy consumption of 101 fJ/bit at 1.55 μm. These compact and energy-efficient optical modulators may have broad application prospects in the future optical communication systems.

Abstract: Aiming to be applied in silicon gyroscope, a three-order single loop feedforward modulator with three-bit quantizer and local feedback is designed in this paper. Signal band is 200 KHz, sampling rate is 25.6 MHz, OSR is 64. Ideal modulator is then designed and simulated in MATLAB, getting SNR 125dB. Non-ideal factors are also added to ideal model, DWA technology is adopted to restrain the nonlinearity of multi-bit quantizer, getting SNR 104dB. Finally, transistor-level full-difference modulator is designed and simulated in Cadence, fetting SNR 101.3dB.

Abstract: This paper introduced a kind of frequency control QPSK modulator based on DDS technology,which is implemented based on FPGA.In this way, frequency control QPSK modulator is not only small size, low cost, system stability and high reliability ,but also can conveniently change the frequency of QPSK signal to adjust different environments.

Abstract: In this paper a high-order sigma-delta modulator applied in micro-accelerometer is designed. The modulator chooses the distributed feedback structure. And the signal bandwidth is 500Hz, the oversampling ratio is 250 and sampling frequency is 250KHz. By the MATLAB Simulink simulation, when the input signal is 1g, and the signal frequency is 250Hz, the simulation result is that the noise level is-160dBV at the signal frequency in the ideal situation. And when considering the non-ideal factors, the simulation result shows that the noise level at the input accelerated signal is 20dBV higher than the ideal. The overall circuit was implemented under 0.5 um CMOS process and simulated in Cadence Spectre. The final simulation results show that the signal to noise ratio (SNR) is 97.1dB.

Abstract: In this paper, in order to enhance resolution and guarantee the stability of the micro-gyroscope, a high-resolution lowpass sigma-delta modulator is proposed. It employs single-loop fourth-order and full differential structure. The simulated result on the Simulink platform shows that the SNDR is 105.4dB and the effective number of bits (ENOB) is 17.22bits. The entire circuits are implemented with 0.5μm CMOS process. The simulated result on Cadence shows that the SNDR is 99.7dB. The modulator operates at a sampling frequency of 25.6MHz and the signal bandwidth is 100kHz with 128 oversampling ratio (OSR). The dynamic range (DR) is 120 dB approximately and the SNDR changes linearly with the input level.

Abstract: Sigma Delta modulator is widely used in ADC for kinds of micro inertial sensors, Sigma Delta ADC can be easily integrated with digital circuits. It possesses some performances of good linearity and high accuracy, while it has no such strict requirements for the match of device dimensions. In this paper, the design of third-order Sigma Delta modulator with a structure of single-loop full feed-forward is accomplished, meanwhile it uses local feedback for zero optimization to improve the shaping capacity of the modulator noise within the signal bandwidth. The OSR (over-sampling rate) of the modulator is 128 and the signal bandwidth is 10 kHz. By the system model building and simulation in the Simulink of MATALAB, the SNR is 96.3 dB and the ENOB is 15.71 bits. Then the modulator is implemented into transistor-level circuits with 0.5um process, by the simulation in Spectre of Cadence, the SNR is 88.5 dB and the ENOB is 14.41 bits. 搜

Abstract: The design and simulation of a polarization-independent active metamaterial terahertz modulator is presented in this work. The device incorporates an array of gold triple SRRs on an n-doped gallium arsenide layer to create an active metamaterial terahertz modulator with a high modulation depth, a high modulation speed and an especial polarization-independent performance for use in terahertz communication, imaging and sense.We established the theoretical model and simulatedthe key performances of the device with Ansoft HFSS.The results showed that the device exhibits a polarization-insensitivebehavior with a maximum amplitude modulation depth of 71% and a modulation rate of3.2Mbps at the resonance frequency of0.86 THz.

Abstract: Based on requirements on high performance and high resolution of modulators, a fourth-order Sigma-Delta modulator for audio application is developed in this paper. The modulator is designed under the commercial 0.5μm CMOS process and the circuits are given simulations by Spectre. The sampling frequency of sigma-delta modulator is 11.264 MHz, and OSR is 256 within the 22 kHz signal bandwidth. Measure performance shows that Sigma-Delta modulator enables its maximum SNR to achieve 103.5dB, and the accuracy of Sigma-Delta modulator is up to 16 bit.

Abstract: In this paper a fourth-order single-loop sigma-delta modulator applied in micro-gyroscope is designed. The modulator system chose the fully feedforword structure. The signal bandwidth is 200KHz, oversampling ratio is 64 and sampling frequency is 25.6MHz. By system simulation result in Matlab, the signal to noise ratio (SNR) is 92.3dB and effective number of bits (ENOB) is 15.03bits. The whole circuit of modulator is designed and simulated in Cadence Spectre. It is gotten that the SNR is 78.6dB and changes linearly with input level. When input level is bigger than -4dBFs, the modulator becomes overload.

Abstract: In this paper, a low-distortion fourth-order bandpass sigma-delta (ΣΔ) modulator is proposed based on a switched-capacitor resonator which employs double-sampling technique to relax the requirements for circuits and reduce opamp power consumption and chip area. The modulator is based on the low-distortion low pass ΣΔ modulator. The system level simulation results compare between the low-distortion architecture and the traditional one is given. The full differential circuit applying two-path technique is implemented with TSMC0.18µm CMOS process. It achieves a peak SNR (signal-to-noise ratio) of 85.9dB and DR (dynamic range) of 91dB with 200 kHz bandwidth centered at 20MHz which are better than the conventional bandpass ΣΔ modulator.