Authors: Hilal Tayara, Deok Jin Lee, Kil To Chong
Abstract: This paper introduces auto tuning of proportional-integral-derivative (PID) controllers of DC motor using particle swarm optimization (PSO) method. The DC motor was modeled in Simulink and PSO was implanted on FPGA “cyclone IV E” using the soft processor NIOS II. The results were efficient in reducing the steady state error, settling time, rise time and maximum overshoot in speed control of a DC motor.
390
Authors: Bao Liang Yang, Jia Yong Ye, Zheng Fu Cheng
Abstract: ]:With increasingly serious pollution to surrounding environment,water quality is deteriorating gradually, which on a certain level threats our daily life. In order to detect problems timely, based on FPGA, Multi Parameter Water Quality Online Monitoring System is designed, which, taking Cyclone II FPGA that supports Nios II processor as the core, is responsible for data acquisition, analysis and processing. Data communication adopts General Packet Radio Service (GPRS) to realize the data transmission from acquisition point to the monitoring center. In the analysis of the existing problems of the current water quality monitoring systems, we present the structure and working principle of this system, and then illustrate them from two aspects: hardware and software. Practice shows that the Multi Parameter Water Quality Online Monitoring system with a simple structure is steady, reliable and easy-operated in processing multi-point data acquisition and remote monitoring the whole system, and proves a widely application in the water supply plant of villages and small towns.Key words: FPGA; Water quality; Nios II; remote monitoring
945
Authors: Fu Yang, Wen Ming Zhang, Wan Cai Jiao
Abstract: The CY7C68013 chip of FX2 series products from Company Cypress is used as the bridge between Nios II and the computer. The data communication between the two parts can be realized quickly and stable used the USB 2.0 interface, which made it possible to save the resource on chip. Thereafter Nios II can be set free from the heavy work of data communication. The designation can be used to made a system for data acquisition or image processing based on Nios II which can be used to solve the bottleneck of low speed.
4044
Authors: Xiao Cong Ma, Guang Hui Cai, Hong Chao Sun, Hong Ye Li
Abstract: This paper designs an encryption and decryption system based on the FPGA. The system uses AES algorithm to encrypt and decrypt data. A pipeline IP core is designed with the reconfigurable technology complying with the Avalon bus interface specification. The IP core is applied to be a custom component on Nios II architecture so that the encryption and decryption processes through hardware can be controlled by software. Finally, the program is downloaded to the Altera DE2 development board and completes the testing of encryption and decryption processes. The system can be widely implemented in the field of data security.
368
Authors: Bo Ya Zhang, Xiao Hui Yang
Abstract: This paper designed an image transmission based on FPGA and USB platform, it can complete the verification function of the image acquisition. The image data was stored in the external SDRAM of the FPGA, using Nios II to control each module, it was sent to PC through the UAB bus used CY7C68013A chip and displayed on LabVIEW. In the process of data transmission, the DMA technology accelerated the speed of transmission and reduced the rate of CPU utilization. After experiments, this platform accomplished the functions of image acquisition, image processing and binocular positioning; it has a simple, intuitive display and good compatibility characteristics.
862
Authors: Wen Ping Ren, Chun Lin Shao, Gen Li
Abstract: For the Current, the design of RFID reader based on SCM has large size and not easy to upgrade. This paper conducts a research work on the new design scheme of RFID based on Nios II soft core. The advantage of the design mentioned in the paper is according to the requirements of increasing or decreasing peripheral components. In this design, the System hardware is described in detail and also introduced the control method of RC500.
1009
Authors: Fu Yang, Shu Zhang, Wen Ming Zhang
Abstract: Based on Nios II embedded processor control module, a digital control system was designed for wire feeding control of gas tungsten arc welding(GTAW). In the control system FPGA wave module is used to control the movement of the DC servo motor, and the digital control of pulsed wire feeder for GTAW was achieved. One and the same control module with Nios II embedded processor is used to control the wire feeder and the welding power source. Thus, the current parameter of pulsed welding arc can be obtained and used directly for controlling the speed of wire feeding. At last, the experiment results are provided to verify the validity.
1909
Authors: Dan Dan Han, Tian Chi Zhang, Jing Zhang
Abstract: SOPC technology of Nios II is Used for the design of intelligent digital photo frame in this paper. Developers can integrate design according to actual needs, fundamentally changing the lack of traditional design. Digital photo frame as a whole project is divided into two parts of the hardware module and software system. Functional correctness is verified by Quartus II, further downloaded to the FPGA for debugging, the observation results showed that digital photo frame has a high degree of freedom in the system optimization, which can be extended the life of the product on the market, greatly improving the performance of multi-function digital photo frame.
3296
Authors: Hua Lin Shi, Da Min Zhang
Abstract: On the basis of the EP1C6Q240C8 belonging to Altera Cyclone family, a GPS electronic guide alternative system was designed by SOPC technology based on Nios II soft core processor. The system is based on GPS positioning, integrated application of embedded technology, GIS, communication technology, data acquisition and analysis techniques. Besides, this system can meet the needs of independent tour guides, for example positioning, spots introduction, destination search, path selection as well as emergency communication and so on.
749
Authors: Qing Qing Fu, Ai Ping Wu
Abstract: In this paper, a digital direct current source based on Nios II is studied. The system adopts FPGA as hard core and the main circuit of constant current source consisting of operational amplifier LM358 and power Field Effect Transistor (FET) IRF530. In addition, 12 bit D/A chip MAX531 and 12 bit A/D chip TLC549 are used to monitor the output current. The system outputs current from 20mA to 2000mA with 0.5mA step level, the set current value and actual output current value can be displayed by LCD. Result shows that the system has characteristics of high precision, good stability, small size and high integration.
316