Papers by Keyword: PLL

Abstract: A method for the seamless transition of inverters switched between On-grid and Off-grid modes for a distributed generation (DG) unit is presented in this paper.In this method,voltage-controlled is used in Off-grid mode and power-controlled is used in On-grid mode, The seamless transfer operation between these two modes perform fast dynamic response. The controller is also capable to follow the voltage, current to grid.

Abstract: This device uses TMS320F28027 as the control core. It realizes functions of MPPT, frequency and phase synchronization, under voltage and over current protection, under voltage recovery and so on. It displays its main information on the LCD screen, providing a good man-machine interface. The topology of the main circuit is full bridge inverter which is controlled by doubled frequency SPWM modulation. MPPT is realized with constant input voltage method. Phase tracking is realized with software PLL. The performance of this device is satisfying. The relative voltage error is less than 0.7% when doing MPPT. The relative frequency error is less than 0.09%. The phase error is approximately 2°. The THD of the output voltage is less than 2%. The action voltage of the under voltage protection is 25.02V. The action current of the over current protection is 15.0A. The efficiency of this device is over 84%.

Abstract: The magnetic Fe₂O₃ nanoparticles were prepared by co-precipitation method with FeCl₃ and NaOH as starting reagents. The surface of Fe₂O₃ nanoparticles was modified with tetraethyl orthosilicate. Fe₂O₃@SiO₂ nanocomposites were calcined at 600 °C. The nanocomposites were characterized by scanning electron microscope (SEM), transmission electron microscope (TEM), X-ray diffraction (XRD) and energy dispersive X-ray spectroscopy (EDX). The PLL-Fe₂O₃@SiO₂ (SMNP) was prepared by modifying with poly-L-lysine on the surface. The SMNP combined with plasmid siRNA by static electrical charges as one of gene carriers was transfected into SD rat neurons. The results of fluorescence microscope and Prussian blue staining show that SMNP can effectively enter cells. Therefore, SMNP are one kind of novel and effective gene carriers, it can transfect the plasmid which carries the siRNA into SD rats neurons in vitro.

Abstract: In the foundation of the realization of sensorless control of permanent magnet synchronous motor(PMSM) based on the traditional sliding mode observer, the paper focuses on the research on the chattering impacts on the estimation of rotor position and speed, which are caused by the sliding mode variable structure control. To weaken the chattering, the paper proposes two kinds of methods. First, the paper designs the saturation function with boundary layer thickness variable instead of sign function in the traditional sliding mode observer. Meanwhile, let the phase-locked loop (PLL) combine to the sliding mode observer, and construct the rotor position signal detection unit. Finally, the paper verifies the correctness and effectiveness of the proposed methods through the theoretical analysis and simulation.

Abstract: In dynamic operating environment, it is one of key issues in the research field of electric energy metering that the accuracy of synchronous sampling signal based on phase locked technology. Because operating environment changes from steady state to dynamic, analytical description of PLL input signal becomes an urgent problem to be solved. In this paper, dynamic signal is analyzed mathematically by using zero-crossing detection theory, its phase expression is obtained, then mathematical equivalent conversion is made based on operation characteristics of PLL, its phase input equation is obtained, finally the correctness of the input equation is verified by Fourier transform method. This study lays the foundation for error analysis of electric energy metering system under dynamic condition.

Abstract: The frequency synthesizer is an important part of modern communication system. It is widely used in digital communications, satellite communications, remote telemetry, radar, navigation and other fields. For frequency source with low phase noise and low spurious, this paper gives hardware architecture and implementation method circuit realization of the X-band frequency source which use phase locked and frequency multiplier theory. Its main targets are tested. The test results show that the performance of the frequency synthesizer is preferably with lower spurious level and phase noise.

Abstract: The paper introduces a system using PLL frequency modulation and demodulation technique, and using infrared as the carrier to realize wireless communication. CD4046 is a common CMOS low-frequency phase locked loopintegrated circuit, and it has the characteristics of high VCOlinearity, tunable center frequency and acquisition frequency range, low power consumption and simple for use. The paper introduces the design scheme using the technique for infrared communication, and proposes a method using sing-chip microcontroller to control single channel to realize the simultaneous transmission of acoustic signal and digital signal, which has great practicability.

Abstract: In this paper, based on the programmable frequency dividers HMC394 and AD company's integer PLL chip ADF4107, in the premise of not reducing the phase detector frequency, improved the frequency resolution and effectively inhibits the phase stray. Designed a frequency source with high performance index: high resolution is 10kHz, low phase noise is-91.27dBc/Hz @10kHz, low spurious is less than-60dBc, high harmonic suppression is less than-60dBc,the design method is simple, low cost, flexible control, high performance and widely used.

Abstract: DSP (XC2267) is the main control chip which does the increment PI algorithms and realizes the voltage and current double closed-loop. Three-phase thyristor rectifier method based on the phase self-adjusting of FPGA is proposed. A method for swept-frequency start circuit is designed to implement the transition between the high-power and low-power. The invert system uses the compound control of improved PWM and frequency phase lock to improve the control accuracy and efficiency. Lastly, by using bench, the circuit is tested and the feasibility and effectiveness of the whole system are verified.

Abstract: As an important module in CMMB system, the performance of phase locked loop will directly determines the accuracy, purity and synchronization of system clock. In this paper, a high performance CPPLL circuit is designed to make each system clock of base station to get strict synchronization in frequency and phase. Test results show that the performance of this design meets the CMMB system requirements