Papers by Keyword: Phase Lock Loop

Abstract: Noise multiple and user interference are the two important influencing factors that carrier synchronization technology in the wireless communication system faces. On the one hand, the phase locked loop and data aided carrier synchronization device is faced with poor estimation precision and slow convergence speed. On the other hand frequency offset and channel estimation problem need to be solved in multi-input multi-output (MIMO) communication system collaboration under the condition of dry low signal to noise ratio. So research of carrier synchronization algorithm of low complexity, high precision in view of the low SNR and multi-user communication system is becoming an important issue. 1. Carrier synchronization technology in wireless communication system of low signal-to-noise ratio and multiuser

Abstract: This paper describes the structure and the principle of the NI DAQ based measurement system used for investigating the frequency dependent behavior of instrument transformers in the high voltage system. A computer based NI DAQ card is utilized as the data acquisition system in the new measurement system. The software digital filter and the phase locked loop are implemented to obtain the magnitude and phase angle, respectively. With this measurement system, we investigated frequency responses of several voltage and current transformers at the converter station of the Germany railway.

Abstract: This paper presents an digital microwave oscillator which employs a phase lock loop (PLL) chip and a direct digital synthesizer (DDS) chips to realize a pure frequency at 3.417GHz (half of the ⁸⁷Rb atom ground-state hyperfine transition frequency) for the coherent population trapping (CPT) atomic clock application. And at this frequency, the oscillator demonstrates low noise (lower than-50dBc/Hz@100Hz and lower than-55dBc/Hz@1kHz) and purity. Moreover, based on the communication between a computer and the MCU, this oscillator could be completely controlled by self-developed user interface.

Abstract: This paper studies the control theory and the methods of the silicon micromachined resonant accelerometers(SMRAs). According to the structure and movement of the resonant accelerometer, the model of its dynamics and the equations of motion are deduced. The model of the closed-loop control is set up with the phase lock loop (PLL). The principle of PLL is expounded in detail. The requirements for phases and gains of the sinusoidal self-drive-oscillation are met by PLL. The average method is to take the average of slowly changing variables within a cycle to find the solutions of nonlinear equations. Using the average method, it analyzes the PLL’s phase control methods in depth and derives the system stability condition. The simulation results verify the correctness of the stability condition. It provides a guiding theory for the realization of SMRA’s precision control.

Abstract: Clock and Data Recovery (CDR) means that the digital data streams are sent without an accompanying clock signal. A digital CDR circuit is proposed as it does not depend on the special analog process and provide higher immunity to the noise. This design is fabricated using 0.13μm standard process and the circuit can support up to 5 GHz data rate to support the high speed standard. Compared to other CDR design with more advanced technology, our implementation can have similar performance but the manufacturing cost can be reduced.

Abstract: The reliability and optimal design of Micro Electro Mechanical Systems (MEMS) can be achieved only with the determination of material properties at the micro-scale. The major challenges in performing fatigue tests at the micro-scale are related to the accurate measurement of tiny deformations, to the control of very low forces and to the preparation, handling and positioning of μm-sized samples. In order to investigate the fatigue behaviour of MEMS components a new experimental setup based on the Phase Lock Loop (PLL) technique and a continuum mechanical model were developed for the characterization of micro-sized test samples. The main advantage of PLL is the achievable resolution in the crack length measurement, which increases with the decreasing of specimen size. Therefore, micro-beams with notches and without notches were prepared by electroplating Nickel in a SU8 photoresist mold (UV-LIGA). Investigations on the initiation and near-threshold crack growth behavior were performed to improve the understanding of the micro-mechanisms involved in fatigue phenomena.