Authors: Shota Tani, Masato Urakami, Wataru Saito, Shin Ichi Nishizawa
Abstract: In bulk SiC crystal growth using the PVT method, recrystallization within the source material leads to a decrease in growth rate and source utilization. In this study, numerical simulations were used to investigate the source temperature distribution and its effect on the growth rate and source utilization. Recrystallization in the upper and lower regions was considered separately. The results showed that reducing the source temperature gradient prevents recrystallization in the upper region, and a unidirectional gradient prevents recrystallization in the lower region, leading to higher growth rates and source utilization.
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Authors: Chae Young Lee, Su Ho Kim, Jung Woo Choi, Myung Ok Kyun, Jung Gyu Kim, Kap Ryeol Ku, Yeon Suk Jang, Jung Gon Kim, Won Jae Lee
Abstract: Seed crystal stabilization during the initial stage of 200-mm 4H-SiC crystal growth is critical for achieving high-quality wafers with large diameters. This study investigated the effects of heating ramp rates (0 - 6 °C/min) and SiC source powder porosity through both simulation and experimental approaches. Low ramp rates resulted in surface degradation of the seed crystal, whereas high ramp rates induced significant thermal stress, leading to cracking. Optimal ramp rates of 3 - 5 °C/min significantly minimized damage caused by seed crystal loss. Furthermore, high-porosity source powder facilitated adequate gas transport channels, thereby enhancing seed crystal stability. Crystals grown under these optimized conditions demonstrated improved edge morphology, absence of polycrystalline inclusions, and low dislocation densities, with threading screw dislocations (TSD) below 500 cm-2 and basal plane dislocations (BPD) below 1,000 cm-2. These results demonstrate that precise control of thermal parameters and source powder porosity offers an effective strategy for stable seed attachment and reproducible growth of high-quality, large-diameter SiC single crystals.
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Authors: Andrey Soukhojak, Gil Chung
Abstract: A detailed knowledge of the growth front geometry during physical vapor transport (PVT) growth of SiC single crystals is beneficial to achieve high quality n+ SiC substrates for power device applications. In this report we show how mapping of resistivity in SiC wafers can shed light on local growth conditions, which are very difficult-to-study in situ. We consider both thermodynamic quantities (absolute temperature T and partial pressure pN₂) and geometric characteristics of the growth surface relevant to growth kinetic parameters, namely atomic terrace width and atomic step velocity. Specifically, we show how an elevation map of the growth surface can be reconstructed from a spatially-resolved measurement of resistivity in a SiC wafer by integrating the spatial derivative of elevation with respect to the basal plane, which is assumed to be related to local resistivity through dependence of non-equilibrium nitrogen incorporation on the atomic step velocity.
19
Authors: Johannes Steiner, Binh Duong Nguyen, Stefan Sandfeld, Peter J. Wellmann
Abstract: To prevent arrays of basal plane dislocations (BPD) forming during grown 4H-SiC single crystals, the growth cell in physical vapor transport (PVT) growth was modified by adapting the temperature gradients, the seed attachment method and the seeding phase. The resulting reduction in stress was modeled numerically and the crystals were investigated by X-ray topography (XRT) and molten potassium hydroxide (KOH) etching. Due to these modifications, the formation of BPD arrays was completely suppressed.
9
Authors: Johannes Steiner, Binh Duong Nguyen, Melissa Roder, Andreas N. Danilewsky, Stefan Sandfeld, Peter J. Wellmann
Abstract: Screw-type dislocations like micropipes (MP) and threading screw dislocations (TSD) are prohibiting the function or at least diminishing the efficiency of electronic devices based on silicon carbide (SiC). Therefore, it is essential to characterize wafers in an efficient and fast manner. Molten potassium hydroxide (KOH) etching or white-beam X-ray topography (SWXRT) are either destructive or not economically viable for an in-depth characterization of every wafer of one SiC crystal. Birefringence microscopy is being utilized as a fast and non-destructive characterization method. Instead of microscopic setups, commercially available flat-bed scanners equipped with crossed polarizer foils can be used for fast large-area scans. This work investigates the feasibility of such a setup regarding the detection rate of MPs and TSDs. The results of a full-wafer mapping are compared with birefringence microscopy and KOH etching. In the investigated sample clusters of MPs caused by a polytype switch in the beginning of the growth could be identified by both birefringence microscopy and the flat-bed scanner setup, as well as small angle grain boundaries and TED arrays. However, the resolution of the scanner was not sufficient to identify TSDs. Nevertheless the setup proves to be an easy-to-setup and cheap characterization method, able to quickly identify defect clusters in 4H-SiC wafers.
113
Authors: Andrey Soukhojak, Tyler Stannard, Ian Manning, Charles Lee, Gil Chung, Matthew Gave, Edward Sanchez
Abstract: X-ray topography (XRT) presents itself as an attractive non-destructive method to replace industry-standard destructive KOH etching used to measure dislocation density. However, a production-line-compatible XRT has to employ a low scan speed in order to work well with automated image analysis, which makes it impractical for a high-volume manufacturing to scan an entire wafer. We introduce the “radial band” approach to sampling the entire wafer’s area with a single-pass 16 mm tall scan band. Such a band spans the entire range of radii and thus captures the typically strong radial dependence of dislocation density over the entire range, while mostly ignoring the typically weak angular dependence of dislocation density and averaging the inevitable noise over the 16 mm band height. The XRT scan time savings for this approach are roughly 15-fold and 20-fold for 150mm and 200mm wafers respectively.
304
Authors: Ian Manning, Kevin Moeggenborg, Andrey Soukhojak, Jon Searson, Matthew Gave, Gil Chung, Edward Sanchez
Abstract: 200 mm diameter n-type 4H SiC wafers were produced from bulk crystals grown using a physical vapor transport (PVT) method. The configuration of the growth cell was modified to both allow for the growth of larger crystals with respect to the standard 150 mm process, and to induce a thermal environment necessary to increase the mass deposition rate. A 25% increase in deposition rate was achieved relative to the standard process. The resulting wafers exhibited resistivity uniformity comparable to commercial 150 mm product. Optical and x-ray techniques were used to evaluate wafer quality, and revealed surface and bulk crystal defect densities acceptable for epilayer growth.
54
Authors: Atsuki Hidaka, Akinobu Takeshita, Kohei Ogawa, Tatsuya Imamura, Kota Takano, Kazuya Okuda, Hideharu Matsuura, Shi Yang Ji, Kazuma Eto, Takeshi Mitani, Kazutoshi Kojima, Tomohisa Kato, Sadafumi Yoshida, Hajime Okumura
Abstract: We measure the temperature-dependent resistivity (ρ(T)) for thick heavily Al- and Ncodoped p-type 4H-SiC samples grown by chemical vapor deposition (CVD), physical vapor transport (PVT), and solution growth (SG), and investigate their conduction mechanisms. For samples with an Al concentration (CAl) of 3.5×1019 to 1×1020 cm-3 grown by CVD, PVT, and SG, the conduction mechanisms at high and low temperatures are band and nearest-neighbor hopping (NNH) conduction, respectively. In the range CAl of 1×1019 to 3.5×1019 cm-3, on the other hand, an anomalous conduction, referred to as X conduction here, is observed between the band and NNH conduction regions for the samples grown by CVD and PVT, but not those grown by SG. One of the differences between the samples grown by CVD and PVT and those grown by SG is the off-orientation toward [11-20] of the (0001) 4H-SiC substrate. We discuss the reason for the appearance of X conduction, which appears to be consistent with dopant-concentration inhomogeneity model.
224
Authors: Rafael Dalmau, Jeffrey Britt, Hao Yang Fang, Balaji Raghothamachar, Michael Dudley, Raoul Schlesser
Abstract: Large diameter aluminum nitride (AlN) substrates, up to 50 mm, were manufactured from single crystal boules grown by physical vapor transport (PVT). Synchrotron-based x-ray topography (XRT) was used to characterize the density, distribution, and type of dislocations. White beam topography images acquired in transmission geometry were used to analyze basal plane dislocations (BPDs) and low angle grain boundaries (LAGBs), while monochromatic beam, grazing incidence images were used to analyze threading dislocations. Boule diameter expansion, without the introduction of LAGBs around the periphery, was shown. A 48 mm substrate with a uniform threading dislocation density below 7.0 x 102 cm-2 and a BPD of 0 cm-2, the lowest dislocation densities reported to date for an AlN single crystal this size, was demonstrated.
63
Authors: Rafael Dalmau, H. Spalding Craft, Jeffrey Britt, Elizabeth Paisley, Baxter Moody, Jian Qiu Guo, Yeon Jae Ji, Balaji Raghothamachar, Michael Dudley, Raoul Schlesser
Abstract: Aluminum nitride (AlN) single crystal boules were grown by physical vapor transport (PVT). Diameter expansion during boule growth, without the introduction of low angle grain boundaries (LAGB) around the boule periphery, was confirmed by crossed polarizer imaging, synchrotron white beam x-ray topography (SWBXT), and synchrotron monochromatic beam x-ray topography (SMBXT). The densities of basal plane dislocations (BPD) and threading edge dislocations (TED) averaged from high-magnification topographs of five regions of a high-quality substrate were 0 cm-2 and 992 cm-2, respectively. Substrates fabricated from AlN boules possessed excellent surface finishes suitable for epitaxy.
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