Papers by Keyword: Power Module

Abstract: With the continuous advancement of SiC device design and manufacturing processes, devices of the same ratings are achieving higher turn-on speeds and smaller chip areas. These improvements enhance the speed and power density of power electronic systems but also pose greater challenges for thermal management and the parasitic parameters of packaging. To address these issues, this paper proposes a multi-chip SiC power module packaging structure based on a multilayer ceramic substrate. Compared to a conventional single-layer DBC substrate, the multilayer substrate structure incorporates an additional intermediate copper layer, which serves as a current return path. Due to the close proximity between this return path and the upper copper layer, the overall loop area is reduced, thereby lowering the parasitic loop inductance. Simulation results show that the designed 800 V, 50 kW SiC power module achieves a parasitic loop inductance of around 3.22 nH at 10 MHz. In addition, traditional multilayer DBC structures are typically formed by soldering two separate DBC substrates together. Such soldered interfaces are often mechanically unstable, and electrical continuity between the upper and intermediate copper layers is not established. The structure proposed in this work adopts a monolithic substrate, in which a single 300 μm thick copper layer is embedded without the use of additional solder. Compared to conventional multilayer substrates, this configuration offers improved thermal conduction by eliminating solder interfaces and enhancing heat flow.

Abstract: Paralleling SiC MOSFETs in high-power modules introduces overvoltage and oscillation risks due to parasitic capacitances and inductances. This study presents a 200 kW EV inverter module co-designed at the device and packaging level to ensure switching reliability under harsh automotive conditions. At 800 V, the planar SiC MOSFET maintained stable gate voltage, while a benchmark trench device module experienced severe ringing and failure. Kelvin-source structures and internal gate resistors mitigated parasitic turn-on, and device-level optimizations—including a 0.5 µm foundry technology, silicide gate, and hexagonal cell layout—improved body-diode performance, together with the channel mobility, blocking voltage, and minimized on-resistance and switching losses. The resulting AEPR25B12C1STJN module demonstrated effective resonance damping, matched the performance of commercial trench module FS03MR12A6MA1B in static and dynamic tests, and achieved 98% AC efficiency with over 200 kW output at 150 °C junction temperature.

Abstract: In standard environmental reliability tests, Silicon Carbide (SiC) MOSFETs show a superior performance compared to their Silicon counterparts. This raises the question if the SiC modules are robust and reliable under all circumstances in the field and against all failure mechanisms or only in the standard laboratory tests. The HV-H³TRB (High Voltage – High Humidity High Temperature Reverse Bias) test is the standard test for humidity reliability and SiC modules survive this test for several thousand hours, easily surpassing the 1,000 h qualification requirement. However, in field service the devices are exposed to steep voltage slopes (high dv/dt) instead of the DC voltage stress applied in a standard HV-H³TRB. In this work, a dynamic HV-H³TRB test was performed on 3.3 kV SiC MOSFET modules for more than 4,000 h with switched high voltages of 80% V_nom, only observing minor degradations and reversible blocking capabilities.

Abstract: This study introduces a surrogate model-based optimization methodology to explore a wide design space of power module packages for achieving user-defined electromagnetic design objectives, such as minimizing commutation loop stray inductance, gate loop stray inductance and balancing mutual inductance. A half-bridge module with four parallel SiC devices per switch position is analyzed, incorporating 17 design variables across terminals and substrate dimensions. Using Sobol sampling, 4096 design variations were simulated in Ansys Q3D to train the surrogate model, enabling efficient gradient-based single- and multi-objective optimization. Results show that the proposed methodology significantly accelerates exploration in a wide design space and outperforms traditional expert-driven methods by identifying superior electromagnetic performance.

Abstract: In this study, the simultaneous realization of high-speed and high-temperature switching operations is demonstrated using a custom-made high-speed and high-temperature power module installed with a silicon carbide (SiC) CMOS gate driver, which can reduce gate loop inductance and operate at high temperatures. Approximate switching speeds of 70 and 60 V/ns are achieved during the turn-on and turn-off operations, respectively, at 300°C, 600 V DC bus voltage, and 20 A load current using the developed module. The switching speed remained above 50 V/ns in the temperature range from room temperature to 300°C. Numerical calculations based on the static properties of the SiC power MOSFET and CMOS gate driver can predict the actual switching properties over a wide temperature range when the developed module incorporating the fabricated SiC CMOS gate driver is used.

Abstract: This paper presents a compact model implemented in SPICE environment for silicon carbide (SiC) MOSFET. The model is easily adjustable to devices belonging to different voltage and current ratings. A previous release of the model was tuned to match the performance of 1.2 kV and 3.3 kV SiC MOSFETs, while, in this contribution, an improved version of the compact model is calibrated for 1.7 kV devices. The agreement between the experimental and simulated data, achieved for both static and dynamic conditions, associated to the model simulation speed, emphasize its suitability as a tool for the simulation of converter containing wide arrangements of devices.

Abstract: A transient thermal network model is utilized to design and evaluate the transient thermal characteristics of power modules. Static test method identifies the transient thermal network model from the time response of the junction temperature, which is obtained by using the temperature dependency of I-V characteristics for power devices. This paper experimentally evaluates the effect of the sampling frequency and the resolution of the AD conversion on the accuracy of the obtained transient thermal network model. The high sampling frequency and the high resolution in the obtained time response of the junction temperature enable to clearly identify the transient thermal network model of the power module with the direct bonding copper substrate.

Abstract: TPG-core IMS concept was jointly explored in this study. Integrating high thermally conductive TPG graphite core into IMS is expected to simultaneously achieve high thermal conductivity from TPG and electrical functionalities from IMS. Nearly 2x thermal conductivity and 30% weight saving was demonstrated on TPG-core IMS compared to conventional Cu-core IMS. Significant junction temperature reduction (11°C) in steady state and power cycling was revealed by the thermal analysis as the result of improved thermal spreading in plane and through the thickness. The study also proved the manufacturability and compatibility of this TPG-core IMS structure to the existing IMS production and power module assembling. The integration of TPG and IMS paves a new packaging route to increase heat load, improve reliability, simplify module design and reduce assembling cost and number of steps.

Abstract: This paper focuses on how to define and integrate the system level and power module level with optimal conditions in SiC and Si-IGBT. To investigate the above situation, we compare the performance of SiC and Si-IGBT in power module and system level at different ambient temperatures. At the same maximum junction temperature 150°C and ambient temperature at 25°C and 80°C, it found that SiC type electrical resistance, maximum endurable current, and voltage could be better than the IGBT type power module above 20%. On the other hand, the simulation of three-phase inverter at different switching frequency such as 10kHz, 15kHz, 20kHz, 30kHz and it had been observed that the power loss of SiC inverter are 78% less for 10kHz switching frequency; 82% less for switching frequency at 15kHz; 85% less for 20kHz of switching frequency; 89% less for switching frequency at 30kHz in the Si-IGBT three-phase SPWM inverter at ambient temperature 80°C.

Abstract: Despite their growing adoption in a variety of applications, SiC MOSFETs are generally not available at high current rating. Therefore, there is a high demand for power modules exploiting configurations based on parallel devices. However, these products still need optimization in order to ensure long-term reliability. This paper presents a methodology relying on fast electrothermal simulations aimed at aiding this optimization procedure. The proposed approach is applied to a power module in which the parallel MOSFETs are realistically subject to mismatched parameters.