Papers by Keyword: Reactive Ion Etching

Abstract: Electrochemical etching (ECE) of silicon carbide is a powerful route to porous 4H‑SiC. Yet, reliable pore initiation on the Si-face typically requires additional sophisticated pre-conditioning (e.g. masked KOH etching, metal-assisted photochemical etching (MAPCE), focused ion beam (FIB) milling), limiting industrial adoption. We demonstrate a simple, CMOS‑compatible pre‑conditioning based on short reactive‑ion‑etching (RIE) steps (10–30 s, SF₆/O₂) that reproducibly nucleate pores on the Si‑face of highly doped 4H‑SiC (resistivity < 0.02 Ω·cm) and enable homogeneous ECE in HF/ethanol without UV illumination. Surface roughness increases modestly with RIE time (R_a ≈ 1.3 nm to 4.0 nm), while subsequent ECE does not significantly degrade topography. SEM cross‑sections reveal continuous porous layers; image‑based quantification shows enhanced vertical pore alignment with longer RIE duration. A stepwise voltage program (11.5 V → 8.5 V → 11.5 V) yields stable current transients during etching. Eliminating noble metals and lithography reduces contamination risk. It improves process compatibility with front‑end manufacturing while remaining synergistic with our previously established ECE process flows and high‑temperature reorganisation of thin, porous SiC layers.

Abstract: This study focuses on the trench etching process for the fabrication of SiC Superjunction Schottky diodes, utilizing an ICP-RIE technique. Through a series of experiments, we optimized the etching parameters, including ICP power, RF power, and SF₆ gas flow rates, to achieve etching rates ranging from 157 nm/min to 372.1 nm/min. Additionally, the study identified the performance of the hard mask as a critical issue during the etching process, which was improved by reducing the RF power below 80 w. The deepest trench achieved reached a depth of 21 μm at 75 w RF power, 1000 w ICP power and 40 sccm SF₆, confirming the feasibility of this approach for fabricating high-performance SiC superjunction devices.

Abstract: This paper presents a study on monitoring the native oxide growth on silicon micro-pillars. It also presents a comparison between the rates of oxide growth on pillars fabricated using the reactive ion etching (RIE) approach and the metal assisted chemical etching (MACE) approach. The native oxide growth is monitored using photoluminescence (PL) measurements. PL measurements showed that native silicon oxide grows at a higher rate on MACE pillars compared to RIE pillars. SEM images showed that the MACE pillars exhibit a porous outer layer while the RIE pillars show a dense outer layer. It is concluded that the porosity of the pillars enhances the native oxide growth.

Abstract: The evolution of the CVD diamond coatings morphology after perpendicular direction reactive ion etching was investigated. During the surface treatment, the average surface roughness was reduced. The efficiency of the etching decreases with the increasing of the processing time, until the surface roughness has been reduced by 30±5%. The height points spread over the surface were measured. The quality of the obtained films was investigated using the Raman spectroscopy.

Abstract: We experimentally demonstrate 4H-SiC n-channel, DMOS Insulated Gate Bipolar Transistors (IGBTs) on 180 µm thick lightly doped free-standing n^- substrates with an ion-implanted collector region, and metal-oxide-semiconductor (MOS) gate on (0001) and (000-1) surfaces. The IGBTs show an on-state current of 20A/cm² at a power dissipation of 300W/cm². Threshold voltage of 7.5V and 10.5V was obtained on Si-face and C-face respectively. Both IGBTs show a small positive temperature coefficient of the forward voltage drop, which is useful for easy parallelization of devices.

Abstract: In this paper we have investigated the effect of two key processing steps for the fabrication of 4H-SiC trench gate power MOSFETs, namely activation annealing and reactive ion etching on the MOS interface properties of a-face (11-20) 4H-SiC. By optimizing activation annealing conditions, high channel mobility (µ_fe) of 111 cm²/V.s, threshold voltage (V_T) of 3.5V and subthreshold slope (S) of 194 mV/dec was obtained. However, after reactive ion etching (RIE) of the surface, µ_fe reduced to 81 cm²/V.s with increase in V_T to 5V and S to 331 mV/dec. This is possibly due to increase in interface trap density from 1.8×10¹² cm^-2 to 3.3×10¹² cm^-2 after RIE treatment estimated from by MOS gated diode characteristics. Increased trap density contributes to higher coulombic scattering as indicated by the weaker temperature dependence of high field mobility in RIE etched sample.

Abstract: In this paper, membranes of 3C-SiC with dimensions up to 10 mm x 15 mm² have been fabricated in epitaxial 3C-SiC/ Si wafers by the means of photolithography, reactive ion etching of 3C-SiC and wet etching of Si. Scanning electron microscope (SEM) micrographs were used to observe the structure of the membrane and the wall formed by the Si wet etching. The quality of the 3C-SiC membranes were observed using Raman Spectroscopy. The remains of <111> Si substrate which was unetched during the Si wet etching were presented with the formation of microstructure defects which showed distinct peaks in comparison to the high quality 3C-SiC membranes at different position. Here, the effect of the membrane fabrication procedures to the 3C-SiC membrane properties especially the morphological structure and its Raman characteristics is discussed in detail.

Abstract: We reported here a convective assembly process for the formation of large-area self-assembled monolayers of silica microspheres on silicon and glass substrates. Uniformly coated monolayers of silica spheres were achieved on silicon wafers with and without coated SiN₂ of 3 inch of diameter and large glass substrate of 6 × 6 in² in size. The coating of large-area uniform monolayers of silica microspheres was characterized with scanning electron microscopy and optical microscopy. The mechanism of the convective assembly has been explained by the convective flux that is generated by capillary immersion force caused from the solution evaporation and hydrodynamic drag force. The patterns of silica microspheres were transferred to the silicon substrates using a deep reactive ion etching technique. It is found that textured silicon reduced the reflectance of silicon substrate from 52.2% to 33.2% around 400 nm and from 33.9% to 19.5% around 1,100 nm. The rapid self-assembled monolayer with silica microspheres provided a glimpse at the wide range of coating and photonic device applications where convective assembly can be used.

Abstract: We investigated impacts of the Ar and CF₄plasma during reactive ion etching (RIE) on defect formation in the Ge substrates using the deep-level-transient-spectroscopy (DLTS) technique. It was found that the Ar plasma causes the roughening of the Ge surface. Moreover, the Ar plasma induces a defect with an energy level of 0.31 eV from the conduction band minimum in the Ge substrate, confirming by DLTS spectra. On the other hand, the CF₄ plasma hardly induces the surface roughness of Ge. However, the CF₄ plasma induces many kinds of electron and hole traps. It should be noted that the defects associated with Sb and interstitials are widely distributed to around 3-µm.

Abstract: In order to improve the transmission and durability of infrared optical materials, the antireflection characteristics of two dimensional sub-wavelength structures on infrared optical materials were investigated. The results of numerical modeling showed two dimensional sub-wavelength structures can improve the transmission of infrared optical materials over a broad band, especially pyramid structures. Then two dimensional sub-wavelength structures on Zinc sulfide were fabricated with contacting ultraviolet lithography and reactive ion etching, A substantial antireflection effect was obtained over the wavelength band 8~12 μm. To improve the environmental durability of the antireflective sub-wavelength structures, Germanium carbide film was deposited on the two dimensional sub-wavelength structures by reactive RF magnetron sputtering.