Papers by Keyword: SOPC

Abstract: Image acquisition and storage are the premise of image processing and analyzing. An embedded image storage system on SOPC technology is researched by introducing acquisition module and initialization in detail. By configuring NIOSIICPU and some corresponding interface modules on FPGA and software design, image data can be stored in SD card. Experiment results indicate that the system works properly and has good application prospects.

Abstract: A design approach of the temperature control of a novel microchip level PCR instrument based on SOPC technique is presented in this paper. The soft-core processor with RISC framework, NIOS II, which embedded in the FPGA (CyclonIII EP3C16F484C6) of Altera corp., is used as the key component to control the PWM controller achieving the temperature control of the micro-chamber stationary microchip level PCR instrument, to control the Avalon stream slave peripheral acquiring controller achieving the temperature signal detection by the flexible snake like copper wire temperature sensor, and to control the micro-pump and the micro-valve achieving the sample injection and sample outflow controlling. Simultaneously, the control temperature algorithm based on the Smith predictive and adaptive Fuzzy-PID is adapted in this system. The design of PCR microchip, the Smith predictive adaptive Fuzzy-PID temperature control algorithm, the hardware framework and the software design of control system are mainly introduced. And the simulation results testified the correctness of the design method and practicability. Keywords: Microchip level PCR instrument; Smith predictive and adaptive Fuzzy-PID controller; SOPC; The flexible snake like copper wire temperature sensor

Abstract: SoPC technology is a high-performance, low-power consumption embedded system solution based on embedded microprocessor, providing a new way for developing new type centralized engineering seismograph. The paper presents the development of a new type centralized engineering seismograph based on SoPC technology, which adopts FPGA design based on SoPC technology for the hardware design and embedded software program development of the 48-channel engineering seismograph. According to actual needs of currently available centralized engineering seismograph, combining the actual characteristics of SoPC embedded technology, a portable, low-power consumption and high-performance new type centralized engineering seismograph is constructed. The paper describes the hardware design and software program implementation of the centralized engineering seismograph in detail.

Abstract: On the basis of the EP1C6Q240C8 belonging to Altera Cyclone family, a GPS electronic guide alternative system was designed by SOPC technology based on Nios II soft core processor. The system is based on GPS positioning, integrated application of embedded technology, GIS, communication technology, data acquisition and analysis techniques. Besides, this system can meet the needs of independent tour guides, for example positioning, spots introduction, destination search, path selection as well as emergency communication and so on.

Abstract: In order to investigate the system performance, its necessary to select an even background point target as the imaging object. The system realizes the real-time sampling, processing and displaying infrared image through joint debugging the SOPC processing system. SOPC is a flexible and effective SOC solution because of its flexibilities of system design, reduction, extension, upgrading, etc. And its hardware and software system are programmable. We present and develop a wireless video monitoring system based on SOPC in this paper, and the system benefits the production of infrared imaging sets of higher performance, lower power consumption and smaller size.

Abstract: The novel FPGA (Field Programmable Gate Arrays) can embed a processor to be an SoPC (System-on-a-Programmable-Chip) environment which allows user to design the applications by mixing hardware and software. Therefore, a motion control system of wafer-handling robot based on the SoPC technology is presented in this paper. In FPGA, it is consists of two modules. The first module is Nios II processor which is used to realize the motion trajectory planning and three-axis position/speed controllers by software. The program developed in Nios II processor uses C language. The second module is presented to implement three-axis current vector controllers by hardware, and VHDL (VHSIC Hardware Description Language) is applied to describe the controller behavior. Therefore, a fully digital motion controller for wafer-handling robot, such as three current vector controllers, three position/speed controller and one trajectory planning are all can implemented by a single FPGA chip. Finally, an experimental system constructed by an FPGA experimental board, one three-DOF wafer-handling robot, and three inverters is set up to demonstrate the correctness and effectiveness of the proposed SoPC-based motion control system of wafer-handling robot.

Abstract: In accordance with the relevant safety standard requirements for electrical equipment, this thesis proposes a residual voltage detection method with high accuracy and low power consumption . The power frequency synchronization signal is obtained by the measuring instrument with the zero-crossing detection circuit used. In the power frequency AC peak moment the measured instrument's power is cut off and the measured equipment's residual voltage is sampled by the input circuit with the high input impedance. Under the control of the NIOSII, the on-line detection of power-down residual voltage of equipment after the 1second and 10seconds is realized with the high speed sampling /hold-circuit and high precision ADC module used. The experimental result shows that the measuring instrument has good stability, with measurement accuracy up to 0.506%, meeting the measurement requirements.

Abstract: A face recognition method based on discrete cosine transform and Gabor transform is proposed. A FPGA-based platform on DE2-115 board is designed by SOPC. We compared our methods with the method based on PC. In the experiments, the nearest neighbor classifier is used to recognize different faces from the Yale face database. Experimental results show that the proposed

Abstract: The paper describes design technology of FPGA and design method of SOPC, and designs DC motor speed control system based on SOPC technology. To be more specific, it includes establishing a Nios II embedded system on FPGA for which PWM, tachometer module and relative driver are customized. It also applies C language programming to actualize PID control algorithm, and conducts simulation on main system module functions.

Abstract: It is very necessary to apply motion detection to video surveillance in order to enhance the performance of system. A new design scheme of video motion detect system based on System On a Programmable Chip is proposed. Two cameras will capture the video data in real-time, and transmitted to DE2_70 development board. After the system which is on a programmable chip based on FPGA processing, the cameras survey whether an illegal personnel is in the range of cameras. The system achieves that two-way video to switch through the switch button. The experimental results show that the SOPC realization of the system design improves the processing speed, and the system also has good flexibility.