Papers by Keyword: SiGe

Abstract: Highly selective etching of SiGe over Si is required for the fabrication of gate-all-around field-effect transistors (GAAFET). A solution consisting of a mixture of H₂O₂, CH₃COOH, and HF is known to etch SiGe with high selectivity over Si. The detailed etching mechanism of SiGe and Si in this solution was investigated in this study. The effect of each chemical species on the etching of SiGe and Si was investigated using various concentrations of H₂O₂, CH₃COOH, and HF. It was found that the etching rate of SiGe was highly relevant to the concentration of peracetic acid (PAA) which was produced by the reaction between H₂O₂ and CH₃COOH. In addition, various additives which can further increase the SiGe selectivity and their mechanisms were investigated.

Abstract: The selective etching of Si in multi-stacked Si and SiGe structures is a key process to fabricate the next-generation of FET, Gate-all-around FET. In this study, we investigated the mechanism of wet chemical etching process at the molecular level for two common ionic solutions, potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH). One of the important factors in the etching process is the reaction rate between the water and Si surface. Therefore, the water dynamics in i) bulk system and ii) Si wall confined system were mainly analyzed using molecular dynamics simulations. As a feature of bulk, TMAH showed the larger hydration structure around cation and the lower mobility of water in the hydration shell compared to KOH. In the Si wall confined system, the water and ion dynamics on the OH-terminated Si surface were distinctive. TMAH showed the lower mobility of water as in bulk system. Furthermore, the concentration and long stay of cation near the Si surface were observed in TMAH. This behavior of cation may directly prevent water from contacting surface. These characteristics of TMAH may slow down the Si etching process. However, if the blocking effect for etching depends on the surface composition, it will be useful for selective etching.

Abstract: Formulated chemical ACT^® SG6xxx series demonstrated SiGe etching selective to SiGe with lower Ge concentration. SiGe etching rate on SiGe/Si multi-stack shown steep trend as a function of Ge concentration, resulting in 338 of selectivity between SiGe30% and SiGe15%. Also, apparent loss on SiN and SiO₂ was not observed. Moreover, SiGe etch rate was not impacted by chemical flow in the beaker. It suggests reaction-controlled based etching, which leads to good within wafer uniformity in etching rate of 300mm wafer spin processing. In conclusion, ACT^® SG6xxx series is a promising option for the formation of BDI/MDIs in Nanosheet, Forksheet and CFET.

Abstract: Using two highly efficient inhibitors, one for silicon and one for SiO₂ and SiN it is possible by varying the hydrogenperoxide concentration to achieve tuneable formulated chemistry concerning selectivity. So, the same formulation can be used for the selective etching of SiGe25 vs. Si like for GAA applications as well as for the selective etching of SiGe40 vs. SiGe20 like for CFET applications.

Abstract: In this study, strain measurement can be analyzed in sub-10nm SiGe layer (~7 nm) grown on [100] Si substrate by chemical vapor deposition at the nanoscale level. The measurement technique is based on transmission electron microscopy (TEM), in which high-resolution transmission electron microscopy (HRTEM) image is combined with the image processing of geometric phase analysis (GPA) software. In this case, GPA analyzes the HRTEM images formed at the [011] zone axis to obtain information about strain maps along the [100] growth direction of the nanoscale SiGe region. The strain analyzed in the SiGe layer is within 1.6-2.9% with high precision and high spatial resolution.

Abstract: The steam oxidation of SiGe shows a transition from Si-like to Ge-like oxidation behavior depending on Ge concentration and oxidation temperature. Ge-like oxidation is described by the generation of oxygen vacancies (VO) at the interface between the oxide and SiGe virtual substrate. [1] Due to the different oxidation behavior, the presence of a Ge-oxide-free interfacial layer (IL) can suppress SiGe oxidation. [2] Here we show how a passivating interfacial layer can be grown using low-pressure oxidation and highlight the importance of SiGe surface preparation prior to low-pressure oxidation.

Abstract: In this atomic-scale study on technologically relevant group IV semiconductors, Ge and SiGe, we relate surface chemistry, in particular the nature of surface oxides, to wet etching kinetics. ICP-MS quantification of Ge in HCl solution containing H₂O_­2 as the oxidizing agent showed that the Si bulk concentration strongly impacted the etching kinetics. Post operando synchrotron XPS provided insight into the surface oxide chemistry involved in the etching process: a non-homogeneous porous layer with a depletion of Ge components at the outer surface due to pull out effects.

Abstract: 3 formulated etchants were prepared and their etch rates were measured using blanket wafers in order to confirm that the etching reactions on Si_1-XGe_X and Si are controllable. Si_1-XGe_X selective etching with those formulations was also verified using the wafers which had Si_1-XGe_X and Si multi-stacked structures. Cross-sectional transmission electron microscope (TEM) images suggested that the formulations were usable for Si_1-XGe_X selective etching processes.

Abstract: Gate All-Around (GAA) is considered a key design feature for future CMOS technology. SiGe vs. Si selective etch is required for Si nanowire formation in GAA. It is confirmed the selective SiGe removal with commodity chemical (mixtures of hydrofluoric acid (HF), hydrogen peroxide (H2O2) and acetic acid (CH3COOH, HAc)), however the thick oxidized layer on Si NW was observed after commodity chemical process, which is indicated the significant Si NW loss. On the other hand, the formulated mixture ACT® SG-101, which is focusing on SiGe oxidizer, chemical pH, solvent polarity & corrosion inhibitor for chemical concept, was performed higher selectivity and lower Si loss than commodity chemical. The formulated mixture has also been used to form an inner spacer for cavity etch scheme and confirmed uniform cavity etch and inner spacer filling on topological test structure.

Abstract: In Situ gas phase passivation methods can enable new channel materials. Toward this end pure anhydrous HOOH and H2NNH2 membrane gas delivery methods were developed. Implementation led to Si-OH passivation of InGaAs(001) at 350C and Si-N-H passivation of SiGe(110) at 285C. XPS and initial electrical characterization has been carried out. Feasibility for In Situ dry surface preparation and passivation was demonstrated.