Papers by Keyword: TED

Abstract: We introduce a polarization superimposed phase contrast microscope (PS-PCM) for wide-gap semiconductor wafers as a new analytical technique that enables non-destructive and three-dimensional characterization of threading dislocations; TSDs and TEDs in SiC epilayers and substrates, such as discrimination each other or detection of their inclination in the depth direction.

Abstract: Semiconductor devices rely on the incorporation of donor and acceptor atoms into the crystal lattice to form locally doped regions. For dopant atoms incorporated into SiC by ion implantation, a high-temperature annealing step is required to achieve electrical activation. This annealing step is accompanied by redistribution of the implanted atoms. The influence of the annealing parameters on dopant redistribution is crucial when aiming for ever smaller device dimensions. In this work, we present a consistent analysis of the diffusion of Al implanted in 4H-SiC after high-temperature annealing at 1650 °C and 1800 °C for different annealing times. We identify the equilibrium diffusion coefficient at long annealing times from Al profiles obtained by SIMS analyses for both annealing temperatures. The temperature dependence is determined using an Arrhenius representation. This allows to quantify the equilibrium diffusion lengths for the actual temperature profiles, including heating and cooling rates. We find that the measured diffusion lengths for short annealing times are larger than expected from equilibrium diffusion and attribute the excess length to transient enhanced diffusion. Comparing the transient diffusion lengths of room-temperature and 500 °C-implanted samples, we conclude that the transient behavior is likely related to residual crystal damage induced during the implantation process.

Abstract: In this work the effect of the ion implantation on the dislocations structure of the 4H-SiC epilayer after the KOH etching has been investigated. The study was conducted using both Aluminum (Al) and Phosphorous (P) species for p-type and n-type, respectively. The ion implantations of Al and P were carried out at different energies (30–200 keV) to achieve 300 nm thick acceptor box profiles with a concentration of about 10²⁰ at/cm3. The implanted samples were annealed at high temperatures. With sequential sacrificial and stopping layer both species has been implanted on the same sample. Morphological charaterization of the samples (optical microscope and SEM) shown different structural modification of the dislocations (experically TED) after the KOH etching of the samples.

Abstract: A non-destructive, fast and accurate extended defect counting method on large diameter SiC wafers is presented. Photoluminescence (PL) signals from extended defects on 4H-SiC substrates were correlated to the specific etch features of Basal Plane Dislocations (BPDs), Threading Screw Dislocations (TSDs), and Threading Edge Dislocations (TED). For our non-destructive technique (NDT), automated defect detection was developed using modern deep convolutional neural networks (DCNN). To train a robust network, we used our large volume data set from our selective etch method of 4H-SiC substrates, already established based on definitive correlations to Synchrotron X-Ray Topography (SXRT) [1]. The defect locations, classifications and counts determined by our DCNN correlate with the subsequently etch-delineated features and counts. Once our network is sufficiently trained we will no longer need destructive methods to characterize extended defects in 4H-SiC substrates.

Abstract: Synchrotron X-ray topography was carried out for 4H-SiC crystals grown by high-temperature gas source method, and transmission topography analysis with g= or 0004 was carried out for the cross-sectional samples. Dislocation contrasts extended in the growth direction were observed and the propagation behavior of threading screw dislocations (TSDs), threading edge dislocations (TEDs), basal plane dislocations (BPDs) and stacking faults (SFs) in the facet and step-flow regions were discussed. The propagation of dislocations in the fast grown crystal with a growth rate of 3.1mm/h was also evaluated by cross-sectional topography.

Abstract: Dislocation structures at the seed/grown-crystal interface in PVT-grown 4H-SiC crystals are investigated. The dislocation density is found to show a sharp increase at the interface and its main contribution is probably ascribable to TEDs which stem from BPDs generating at the interface through the structural transformation. Intense TEM observations reveal an intriguing in-plane distribution structure of the interface BPDs; the BPDs form a two-dimensional dislocation network comprising of {-1100} partial dislocations associated with expanded areas of stacking faults at the nodes of the network.

Abstract: Two types of shallow surface defects associated with treading dislocation were found out by using mirror projection electron microscope. One was single groove with a dimension of about 4 nm in depth, 2 μm in width and 15 μm in length, named “as nanogroove”. The other was a shallow groove at 1.3nm in depth being between pair of hillocks at 2-3 nm in height and 1.5 μm in distance, named as “nanohillock pair”. Dislocations combined with the defects were found out by micro-KOH etching method with low-energy scanning electron microscopy. The dislocations were identified by g-b analysis using scanning transmission electron microscopy as threading edge dislocations converted from basal plane dislocation at bulk-epi layer interface or within epi layer.

Abstract: The carbon (C) co-implantation and advanced flash anneal were employed to form the ultra shallow junction (USJ) for future nano CMOS technology applications. The effects of the C co-implantation process on dopant transient enhanced diffusion (TED) of the phosphorus (P) doped nano USJ NMOSFETs were investigated in details. The USJ NMOSFETs were prepared by a foundry’s 55 nano CMOS technology. Various implantation energies and doses for both C and P ions were employed. Results show the suppression of the TED is strongly dependent on both C and P implantation conditions. Besides, the mechanisms of P TED and suppression by C ion co-implantation were illustrated comprehensively with schematic models.

Abstract: The reliability of gate oxides is a fundamental issue for realizing SiC MOSFETs. Many reports said that crystal defects shorten the lifetime of the gate oxide. And, epi defects, the basal plane dislocations and threading screw dislocations (TSD) are considered killer defects. However, because of the high TSD density of commercial SiC wafers, the exact relationship between other kinds of dislocations with lifetime has not been revealed. On the other hand, RAF wafers that we developed have low TSD density, so it is easy to evaluate the relationship between other kinds of dislocations and lifetime. By using RAF wafers, in this study, we clarified the relationship between the lifetime of the gate oxide and crystal defects. We fabricated MOS diodes and measured their lifetimes by TDDB (Time Dependent Dielectric Breakdown) measurement. The breakdown points were defined by the photo-emission method. Finally, we classified the defects by TEM (Transmission Electron Microscopy). As the results, it was clarified that threading edge dislocation (TED) decreases the lifetime as does TSD, which earlier reports said. The lifetime of the gate oxide area, in which a TED is included, was shorter by one order of magnitude than a wear-out breakdown. And, the TSD was two orders.

Abstract: A new method for the separation of threading screw dislocations (TSD) and threading edge dislocations (TED) in a 4H-SiC epitaxial layer is proposed by measurement of the etch pit angles. The etch pit angles of the TSDs and TEDs were 28±3 and 18±3°, respectively. In the case of etch pit depths within the epitaxial layer, the values were almost constant. Almost all of the TSDs were converted from basal plane dislocations (BPDs) at the epitaxial layer/substrate interface.