Papers by Keyword: Trench

Abstract: This work proposes a linear, area‑based component separation method to extract an effective trench sidewall capacitance from C-V measurements of 4H‑SiC UMOS capacitors. Devices were fabricated with two gate‑oxide schemes LPCVD TEOS and low‑temperature oxidation of LPCVD polysilicon and characterized by I-V and C-V measurements. Planar capacitors show breakdown strength above 9 MV/cm. Least‑squares decomposition of layout‑dependent capacitances enabled the separation of mesa, sidewall and bottom contributions. Additionally, this applying this approach revealed trench-pitch dependent depletion and larger wafer‑level thickness variation for the polysilicon‑oxidation flow. Reconstruction errors up to 20 % indicate that spacing‑dependent depletion, corner curvature, fringe and field‑oxide capacitances exceed the simple parallel‑capacitor model.

Abstract: Paralleling SiC MOSFETs in high-power modules introduces overvoltage and oscillation risks due to parasitic capacitances and inductances. This study presents a 200 kW EV inverter module co-designed at the device and packaging level to ensure switching reliability under harsh automotive conditions. At 800 V, the planar SiC MOSFET maintained stable gate voltage, while a benchmark trench device module experienced severe ringing and failure. Kelvin-source structures and internal gate resistors mitigated parasitic turn-on, and device-level optimizations—including a 0.5 µm foundry technology, silicide gate, and hexagonal cell layout—improved body-diode performance, together with the channel mobility, blocking voltage, and minimized on-resistance and switching losses. The resulting AEPR25B12C1STJN module demonstrated effective resonance damping, matched the performance of commercial trench module FS03MR12A6MA1B in static and dynamic tests, and achieved 98% AC efficiency with over 200 kW output at 150 °C junction temperature.

Abstract: This paper presents the development and optimization of a 1.2 kV Silicon Carbide (SiC) Trench MOSFET with a Bottom P-well (BPW), designed to achieve a compact structure and a simplified fabrication process. By performing the BPW implant before the trench etching process and utilizing it in conjunction with a shallow trench, the process complexity was reduced while maintaining effective corner coverage of the trench gate. Comprehensive simulations and unit process analyses were conducted to evaluate the effects of the hard mask sidewall angle, P-well, and JFET implant doses on device characteristics. Optimal performance was achieved by introducing an additional P+ implant in the P-well region, which significantly enhanced breakdown voltage without affecting channel properties. The optimized device demonstrated a specific on-resistance (R_on,sp) of 2.2 mΩ·cm², a breakdown voltage (BV) of 1600 V, and a threshold voltage (V_th) of 3 V, with potential further reductions in R_on,sp through substrate thinning.

Abstract: In this paper, the performance in 3^rd quadrant operation of 3^rd and 4^th generation SiC power MOSFETs have been evaluated. These are the Gen-3 1.2 kV & 18 A Planar SiC MOSFET, Gen-3 1.2 kV & 19 A Asymmetrical Trench SiC MOSFET, Gen-4 1.2 kV & 26 A Symmetrical Double-Trench SiC MOSFET and Gen-4 1.2 kV & 19 A Trench-Assisted Planar SiC MOSFET. Further, the transients of early-stage degradation development are investigated by conducting continuous stress current thorough body diode of the aforementioned devices to explore the extent of degradation in the body diodes of SiC MOSFETs. These devices are compared to provide a better understanding of the impact of different structures.

Abstract: This work presents the results of process development for trench formation in SiC power devices to increase the trench depth by improving SiC/SiO₂-selectivity of the dry etch process. Motivation behind this development is to further improve the electrical properties of conventional devices like SiC MOSFETs by implementing a trench geometry, allowing the cell pitch to be increased, leading to a reduced on-resistance of SiC TrenchMOS devices. Trench etching was performed on 4H-SiC substrates by utilizing an oxide hard mask, patterned by photolithography and dry etching. The SiC trench profile was analyzed by cross-section preparation via FIB and SEM imaging. The highest SiC/SiO₂-selectivity achieved was 7.9, with SiF₄ gas flow being the most decisive parameter for it. With that, the selectivity of the standard SiC trench etch process was increased by nearly five times. SiC trenches with depths of 5 µm could be demonstrated. However, then the structural fidelity was deteriorated, with micro-trenching and sidewall bowing being the largest limitations regarding applicable trench depth in SiC power devices.

Abstract: Effective control of device geometry is key to mitigating high localized electric fields in next-generation SiC power devices. Advanced trench processing allows for highly tunable trench-gate architectures in trench MOSFETs. By utilizing a two-step inductively coupled plasma reactive ion etch (ICP-RIE) process, a high degree of trench base corner rounding can be achieved, irrespective of trench opening corner geometry prior to post etch treatments. Sentaurus TCAD device modelling highlights the importance of effective electric field dispersion at the gate oxide using rounded trench corners, while I-V characterization of fabricated trench MOS-capacitor devices demonstrate the influence of trench base corner rounding on gate oxide breakdown.

Abstract: The SiC trench gate MOSFET with narrow cell pitch is demonstrated using a process in which the n⁺ source is self-aligned to the trench gate. A minimum cell pitch of 1.6 μm, which is difficult to achieve using the conventional device structure, is easily fabricated by applying a deep n⁺ source and a buried interlayer dielectric structure. The cell pitch reduction indicates a beneficial trend that contributes to a decrease in the specific on-resistance and an increase in the breakdown voltage. The process and structure are promising for further improving SiC power device characteristics.

Abstract: SiC MOSFETs have already replace silicon-based device in power applications, even if some technological issues are still not solved. The most important of them is related to the complex traps distribution at SiC/SiO₂ interface. Interface traps affect the overall device behavior, modifying channel mobility and introducing hysteresis. In this work experimental C-V and I-V curves are carried out on various commercial SiC MOSFET at different temperatures. The focus is the comparison of hysteresis arising in trench and planar SiC MOSFETs.

Abstract: This work presents the design methodology and performance of a compact edge termination structure aiming 10kV+ rated Silicon Carbide (SiC) devices. Standard Floating Field Rings (FFRs) for such high voltage rating SiC devices are not favored because they are inefficient in terms of the achievable breakdown voltage as a percentage of the 1D maximum, consume large chip area, require high implantation energies and small gaps between rings which can violate fabrication limits. We show that the implantation of Aluminium at the bottom of carefully positioned trenches can be analogous to deep Aluminium implantation in terms of performance, thus annulling the need for small gaps between rings and MeV ion implantation. We optimize the distribution of trenches by placing them in multiple zones of different expansion coefficient. The proposed multi expansion ratio Trench FFR termination was utilized to terminate the active area of a 10kV rated Punch Through n-IGBT having 0.8 μm p-body and 100 μm, 3×10¹⁴ cm^-3 drift region. We found the 0.6–0.8 µm to be the most optimum trench depth, achieving over 10 kV within less than 500 μm of termination length.

Abstract: The work concerns the use of polyvinyl chloride joints as a modern method of stabilizing the trenches in military construction built on unstable water-saturated slopes by combining it with a transverse drainage. Employment of the method will reduce the hydrostatic pressure on the trench walls, excluding the possibility of collapse, and will increase the efficiency of service at military bases. Polyvinyl chloride joints are used in hydraulic engineering in a number of countries, in the construction of artificial canals, swimming pools and flood protection. The novelty of this method is its usage in flooded areas, which at the same time prevents landslides by organizing drainage.