Papers by Keyword: VLS Growth

Abstract: Au-catalyzed growth of nanocrystalline Si by pulse jet chemical vapor deposition has been investigated. Au thin film was first deposited on thermally oxidized Si(100), then CH₃SiH₃ pulse jets were irradiated onto the Au/SiO₂/Si(100) surface. The irradiation of the CH₃SiH₃ jets at 1150 °C resulted in circular patterns with a diameter of ~40 µm on the sample surfaces. In the center of the circular patterns, agglomerations of Au were observed. It was found that the oxide layer was etched and that nanocrystalline Si with diameters ~500 nm was formed in the circular patterns. These results indicate that the nanocrystalline Si was grown by the VLS process in which Si atoms were supplied from the oxide layer, Si substrate, and CH₃SiH₃ molecules.

Abstract: This work deals with the study of the Selective Epitaxial Growth (SEG) of SiC using the Vapour-Liquid-Solid (VLS) transport on diamond (100) substrate with Al-Si as the liquid phase fed by propane. Morphology, structure and doping type of the SiC deposit were determined. Polycrystalline p-doped 3C-SiC was obtained during the growth. Study of the initial step of growth showed that SiC nucleation occurs without any propane addition but just through the interaction of liquid Al-Si and diamond via a dissolution/precipitation process. This explains the random nucleation and the polycrystalline growth. Despite this, preliminary electrical measurements show encouraging results.

Abstract: In this work we report on SiC epitaxial growth by vapour-liquid-solid (VLS) mechanism on on-axis 4H-SiC(0001) substrates which were previously patterned to form mesa structures. The liquid phase was set to Al70Si30. At 1100°C, it led to very high homoepitaxial lateral growth (140 µm/h) with pronounced spiral growth and in plane anisotropy of growth rate. Upon temperature increase to 1200 °C, this spiral growth was suppressed and the lateral growth was further increased up to 180 µm/h. The in-plane versus out-of-plane anisotropy of growth rate was found to be as high as 60 at this temperature and 46 at 1100°C.

Abstract: Selective epitaxial growth in buried patterns was studied using the vapour-liquid-solid mechanism in Al-Si melt in order to obtain p+-doped SiC localized layers on 4H-SiC substrate. Homogeneous deposition with step bunched morphology was obtained by adding propane at room temperature before growth at 1100°C. Patterns as large as 800 µm and as narrow as 10 µm were completely filled in this way. The deposition kinetics demonstrates that the process is self limited and mainly depends on the initial amount of Si in the liquid. The deposit is highly p-type doped and the p-n junction is demonstrated.

Abstract: In this work we report on the study of twin boundary (TB) evolution during heteroepitaxial growth of 3C-SiC on patterned 4H-SiC(0001) substrate by vapour-liquid-solid (VLS) mechanism. Ge₅₀Si₅₀ melt was used at a temperature of 1450°C. 3C-SiC deposit was obtained on top and outside the mesas. Some lateral enlargement of these mesas was observed but it was systematically homoepitaxial. Elimination of TBs inside the 3C-SiC deposit on top of the mesas was observed for specific mesa shape and/or orientation of the sidewalls. Though three–fold or six-fold symmetry mesas are recommended for TB elimination, originally circular mesas lead also to the same result due to initial faceting toward hexagonal shape.

Abstract: We report the results of a SIMS and micro-Raman investigation performed on cubic (3C) SiC crystals grown on hexagonal SiC seeds using a Ge-Si bath and the so-called Vapor Liquid Solid growth technique. From SIMS measurements, we find a Ge concentration which, roughly, scales like the Ge concentration in the melt and, in term of micro-Raman measurements, explains the presence of weak but discernable Ge-Ge peaks around 300 cm-1. Since no similar Si-Si vibrations are found, this discard the possibility of having at the same time both Ge and Si constitutional super-cooling with two separate Ge and Si phases.

Abstract: Al-Si patterns were formed on n-type 4H-SiC substrate by a photolithographic process including wet Al etching and Si/SiC reactive ion etching (RIE) process. RF 1000°C annealing under C3H8 flow was performed to obtain p+ SiC layers by a Vapour-Liquid-Solid (VLS) process. This method enables to grow layers with different width (up to 800 µm) and various shapes. Nevertheless the remaining Al-based droplets on the largest patterns are indicators of crack defects, going through the p+ layer down to the substrate. SIMS analyses have shown an Al profile with high doping concentration near the surface, high N compensation and Si/C stoechiometry variation between the substrate and the VLS layer. The hydrogen profile follows the Al profile in the VLS layer with an overshoot at the VLS/substrate interface. I-V measurements performed directly on the semiconductor layers have confirmed the formed p-n junction and allowed to measure a sheet resistance of 5.5 kW/ı