Design of 3780 Points FFT Processor for DTMB Receiver

Abstract:

Article Preview

In this paper, a design of FFT processor for Digital terrestrial multimedia/television broadcasting (DTMB) receiver is presented. This processor is based on mixed-radix algorithms, prime factor algorithms and Winograd Fourier Transform algorithm (WFTA). Due to the adopted in-place algorithm in this design, the area consumption of the processor is reduced, and the simulation shows that SQNR of the processor is 60.5dB on the condition that the input and output data are both 13 bits.

Info:

Periodical:

Edited by:

Prasad Yarlagadda and Yun-Hae Kim

Pages:

853-856

Citation:

L. Dai et al., "Design of 3780 Points FFT Processor for DTMB Receiver", Applied Mechanics and Materials, Vols. 239-240, pp. 853-856, 2013

Online since:

December 2012

Authors:

Keywords:

Export:

Price:

$41.00

[1] I. Koffman and V. Roman 2002 IEEE Commu. 96–103.

[2] I. Barhumi, G. Leus, and M. Moonen 2003 IEEE Trans. Sig. Proc. 1615–24.

[3] J. W. Cooley and J. W. Tukey 1965 Math. of Comp. 297–301.

[4] C. M. Rader 1968 Proce. of the IEEE 1107-8.

[5] H. F. Silverman 1977 IEEE Acous., Spe. and Sig. Proc. 152-165.

[6] Winograd S. Proce. of the National Academy of Sciences of the United States of America (USA) pp.1005-6.

[7] M. Hasan, T. Arslan and J. S. Thompson 2003 IEEE trans. Cons. Electron. 128-134.

[8] Y Jung, H. Yoon and J. Kim 2003 IEEE Trans. Cons. Electron. 1099-103.

[9] S. He and M. Torkelson Signals, Systems, and Electronics, 1998. ISSSE 98. 1998 URSI International Symposium on p.257–262.