Research and Design of Digital Clock Based on FPGA

Abstract:

Article Preview

A digital clock system designed by using VHDL hardware description language is presented in this paper. The proposed architecture fully utilizes the digital clock system available on FPGA chips based top-down design method in the Quartus II development environment. The Clock system is divided into four design modules: core module, frequency_division module, display module and tune module. It not only can time accurately and display time, but also can reset and adjust time. The LED lights will flash and the loudspeaker will tell time on the hour. The architecture is implemented and verified experimentally on a FPGA board. Because of the universality of digital clock and the portability of VHDL language, it can be applied directly in various designs based on FPGA chip.

Info:

Periodical:

Edited by:

Yanwen Wu

Pages:

741-745

DOI:

10.4028/www.scientific.net/AMR.187.741

Citation:

J. H. Zhu et al., "Research and Design of Digital Clock Based on FPGA", Advanced Materials Research, Vol. 187, pp. 741-745, 2011

Online since:

February 2011

Export:

Price:

$35.00

In order to see related information, you need to Login.

In order to see related information, you need to Login.