Research of Channel Dismatch Errors in Parallel AD Acquisition System Based on FPGA

Abstract:

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With the development of modem broadband radar, amount of reaserchers focus on broadband radar echo signal acquisitions and feature extraction of the target. Due to the large bandwidth as high as several MHz, the time interleaved ADC system is playing an important in radar echo systems, but this structure will bring in channel dismatch errors. The paper gave an explicit analysis of such three channel mismatch errors, and established the formulas of spectrum when all three mismatch errors exist together. Then presented the measure errors algorithm combined three errors according to the formulas of spectrum and the effective calibration algorithm.The algorithm was implemented in FPGA at last.

Info:

Periodical:

Advanced Materials Research (Volumes 201-203)

Edited by:

Daoguo Yang, Tianlong Gu, Huaiying Zhou, Jianmin Zeng and Zhengyi Jiang

Pages:

2126-2131

DOI:

10.4028/www.scientific.net/AMR.201-203.2126

Citation:

X. L. Shao et al., "Research of Channel Dismatch Errors in Parallel AD Acquisition System Based on FPGA", Advanced Materials Research, Vols. 201-203, pp. 2126-2131, 2011

Online since:

February 2011

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Price:

$35.00

[1] MA XIU JUAN, LIU JING PENG.The design of FPGA in high-speed data acquisition [J].electronics device, 2007(8):1372-1379.

[2] YANG YING JUN, QIN LI, JIAO XING QUAN. The design of multi-channels high-speed data acquisition [J]. the technology of micro-computer, 2007, 1-1:23-25.

[3] HOU BO TING , GU XIN. The design of VHDL hardware description language and digital logic circuits.XI AN:2008, 1-1:23-25.

[4] SONG QIAN, LIANG DIAN RONG , A new timing calibration technique of multi-channel time interleaved ADC Systems, the technology of micro-computer, 1001-1486(2001).

[5] LAN JUN. The multi-channels time interleaved ADC Systems in non-uniform sampledcondition . 2000. 9.

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