Experimental and FEM Study of Serrated Chip Formation in High Speed Turning Processes
The finite element method (FEM) has been used to model high speed turning processes with orthogonal cutting conditions. In most of the situations, continuous chip formation is used to analyze the turning process due to its stability and allowing many conditions to simplify the process. However with the increasing applications of high speed turning, serrated chip formation is becoming a more common phenomenon in metal cutting. Serrated chips usually occur in machining of difficult to cut materials at or above a threshold speed. An updated Lagrangian formulation has been used in this study which works with element deletion technique based on a failure criterion. The Johnson Cook strain-hardening thermal-softening material model is used to model serrated chip formation. In addition high speed turning experiments were conducted on AISI H13 tubes using PCBN to analyze serrated chip phenomenon. The chips were analyzed after surface treatment using scanning electron microscope. It has been found that the length of cuts in the chip increases with the cutting speed and the chip changes from serrated to discontinuous. Different process variables like cutting forces, chip morphology, stress, strain and temperature distributions are predicted at different process parameters using FEM. The results show cyclic variation in the cutting forces at high cutting speeds due to varying chip load.
M.S.J. Hashmi, S. Mridha and S. Naher
U. Umer et al., "Experimental and FEM Study of Serrated Chip Formation in High Speed Turning Processes", Advanced Materials Research, Vols. 264-265, pp. 1021-1026, 2011