Nanoscaled Semiconductor-on-Insulator Materials, Sensors and Devices

Volume 276

doi: 10.4028/

Paper Title Page

Authors: Eugene Chubenko, Alexey Klyshko, Vitaly Bondarenko, Marco Balucani, Anatoly I. Belous, Victor Malyshev

Abstract: In present work the investigation of the electrochemical and chemical hydrothermal deposition processes of ZnO on silicon is presented. The...

Authors: S.O. Gordienko, A. Nazarov, A.V. Rusavsky, A.V. Vasin, N. Rymarenko, V.G. Stepanov, T.M. Nazarova, V.S. Lysenko

Abstract: This paper presents an analysis of the electrical characteristics of the amorphous silicon carbide films deposited on the SiO2/Si substrate....

Authors: V.P. Popov, L.N. Safronov, O.V. Naumova, D.V. Nikolaev, Yury Nikolaevich Palyvanov, Igor Nikolaevish Kupriyanov

Abstract: Graphitic-diamond heterostructure may be very helpful not only for high frequency or power devices but also for new generation of electronic...

Authors: Andrzej Misiuk, Adam Barcz, Jadwiga Bak-Misiuk, Alexander G. Ulyashin, Przemyslaw Romanowski

Abstract: Hydrogen gettering by implantation-disturbed buried layers in oxygen-implanted silicon (Si:O, prepared by O2+ implantation at energy 200 keV...

Authors: V. Dobrovolsky, Fedir Sizov, S. Cristoloveanu

Abstract: Theoretical model of thin film SOI MISFET based on the gate control of impact ionization avalanche in the drain induced p-n+ junction is...

Authors: A. Kohmyakov, V. Vyurkov

Abstract: A semi-analytical model which is applicable to description of ballistic field-effect transistors with low-dimensional channels is proposed....

Authors: V.P. Popov, M.A. Ilnitsky

Abstract: Mobility degradation during gate length scaling is a well established experimental fact, which is confirmed also by Monte –Carlo simulation....

Authors: Mostafa Emam, M.A. Pavanello, F. Danneville, D. Vanhoenacker-Janvier, Jean Pierre Raskin

Abstract: The effect of elevated temperature on the harmonic distortion in Graded-Channel MOSFETs is presented in this work. The Graded-Channel...

Authors: Bodgan Majkusiak, Andrzej Mazurak

Abstract: The paper discusses some issues of modeling the MOS tunnel structure with a gate stack containing a semiconductor quantum well (double...


Showing 1 to 10 of 22 Paper Titles