First Principle Study of Tunnel Currents through CeO2, Y2O3, TiO2 and Al2O3 Dielectrics in MOSFETs for Ultra Large Scale Integration

Abstract:

Article Preview

High gate leakage current, as a central problem, has decelerated the downscaling of minimum feature size of the field effect transistors In this paper, a combination of density functional theory and non equilibrium Green’s function formalism has been applied to the atomic scale calculation of the tunnel currents through CeO2, Y2O3, TiO2 and Al2O3 dielectrics in MOSFETs. The tunnel currents for different bias voltages applied to Si/Insulator/Si systems have been obtained along with tunnel conductance v/s bias voltage plots for each system. The results are in agreement to the use of high dielectric constant materials as gate dielectric so as to enable further downscaling of MOSFETs with reduced gate leakage currents thereby enabling ultra large scale integration. When used as dielectric, TiO2 exhibits extremely low tunnel currents followed by Y2O3 while CeO2 and Al2O3 exhibit high tunnel currents through them at certain bias voltages.

Info:

Periodical:

Edited by:

D. Rajan Babu

Pages:

428-432

Citation:

M. Chakraverty and H. M. Kittur, "First Principle Study of Tunnel Currents through CeO2, Y2O3, TiO2 and Al2O3 Dielectrics in MOSFETs for Ultra Large Scale Integration", Advanced Materials Research, Vol. 584, pp. 428-432, 2012

Online since:

October 2012

Export:

Price:

$38.00

[1] J. Robertson, High dielectric constant gate oxides for metal oxide Si transistors, Reports on Progress in Physics 69 (2006) 327-396.

DOI: https://doi.org/10.1088/0034-4885/69/2/r02

[2] G. Darbandy et al., Analytical modeling of the gate tunneling leakage for the determination of adequate high-k dielectrics in double-gate SOI MOSFETs at the 22 nm node, Solid State Electronics 54 (2010) 1083-1087.

DOI: https://doi.org/10.1016/j.sse.2010.06.015

[3] J. Locquet, C. Marchiori, M. Sousa, J. Fompeyrine and J. W Seo, High-K dielectrics for the gate stack, Journal of Applied Physics 100 (2006).

DOI: https://doi.org/10.1063/1.2336996

[4] M. Cao et al., Boron Diffusion and Penetration in Ultra thin Oxide with Poly-Si Gate, IEEE Electron Device Letters 19 (1998) 291.

DOI: https://doi.org/10.1109/55.704403

[5] G. Ribes, J. Mitard, M. Denais, S. Bruyere, F. Monsieur, C. Parthasarathy, E. Vincent, G. Ghibaudo, Review on high-k dielectrics reliability issues, IEEE Transactions on Device and Materials Reliability 5 (2005) 5-19.

DOI: https://doi.org/10.1109/tdmr.2005.845236

[6] Rajnish K Sharma, Ashok Kumar and John M Anthony, Advances in High-k Dielectric Gate Materials for Future ULSI Devices, Journal of Microelectronic Processing 53(2001) 53-55.

DOI: https://doi.org/10.1007/s11837-001-0105-9

[7] Ebrahim Nadimi et al., First Principle Calculation of the Leakage Current Through SiO2 and SiOxNy Gate Dielectrics in MOSFETs, IEEE Transactions on Electron Devices 57 (2010) 690-695.

DOI: https://doi.org/10.1109/ted.2009.2038646

[8] Y.H. Chang, C. L Lin, T. Y Wang, Electrical and physical properties of HfO2 as gate dielectrics using various thickness of TaN electrodes for MIS capacitors, Microelectronic Engineering 96 (2012) 61-66.

DOI: https://doi.org/10.1016/j.mee.2012.02.043