Dimensional Effect on DIBL in Silicon Nanowire Transistors
Drain-induced barrier lowering (DIBL) is crucial in many applications of silicon nanowire transistors. This paper determined the effect of the dimensions of nanowires on DIBL. The MuGFET simulation tool was used to investigate the characteristics of the transistors. The transfer characteristics of transistors with different dimensions were simulated. The results show that longer nanowires with smaller diameters and lower oxide thickness decrease DIBL and tend to possess the best transistor characteristics.
Mohd Mustafa Al Bakri Abdullah, Liyana Jamaludin, Rafiza Abdul Razak, Zarina Yahya and Kamarudin Hussin
Y. Hashim and O. Sidek, "Dimensional Effect on DIBL in Silicon Nanowire Transistors", Advanced Materials Research, Vol. 626, pp. 190-194, 2013