Impact of the Inhomogenous Structure of Polysilicon TFT's Active Layer on the Electrostatic Potential Distribution

Recently polycrystalline silicon (pc-Si) thin film transistors (TFT’s) have emerged as the devices of choice for many applications. The TFTs made of a thin un-doped polycrystalline silicon film deposited on a glass substrate by the Low Pressure Chemical Vapor Deposition technique LPCVD have limits in the technological process to the temperature < 600°C. The benefit of pc-Si is to make devices with large grain size. Unfortunately, according to the conditions during deposition, the pc-Si layers can consist of a random superposition of grains of different sizes, where grains boundaries parallels and perpendiculars appear. In this paper, the transfer characteristics IDS-VGS are simulated by solving a set of two-dimensional (2D) drift-diffusion equations together with the usual density of states (DOS: exponential band tails and Gaussian distribution of dangling bonds) localized at the grains boundaries. The impact of thickness of the active layer on the distribution of the electrostatic potential and the effect of density of intergranular traps states on the TFT’s transfer characteristics IDS-VGS have been also investigated.

References

In order to see related information, you need to Login.