A theoretical model was developed in order to account for the kinetics of defect state creation in amorphous Si thin film transistors, subjected to gate bias stress. The defect forming reaction was a transition with an exponential distribution of energy barriers. It was shown that a single-hop limit for these transitions could describe the defect creation kinetics well, provided the backward reaction and the charge states of the formed defects were properly taken into account. The model predicts a rate of defect creation given by (NBT)α(t/t0)(β–1), with the key result that α = 3β. The time constant, t0, was also found to depend upon band-tail carrier density. Both results were in excellent agreement with experimental data. The t0-dependence implied that comparison of defect creation kinetics for different thin film transistors could be done only for the same value of band-tail carrier density. Normalization of bias stress data on different thin film transistors made at different band-tail densities was not possible.

Kinetics of Defect Creation in Amorphous Silicon Thin Film Transistors. R.B.Wehrspohn, M.J.Powell, S.C.Deane: Journal of Applied Physics, 2003, 93[9], 5780-8