Fabrication of sub-100nm junctions in ultra-large scale integration became extremely difficult due to anomalous diffusion of B in Si. By judiciously placing vacancy and interstitial defects at different depths by implantation of Si ions with different incident energies and dosages in Si, B diffusion could be enhanced or retarded. After pre-implantation with 50 or 500keV Si+ ions to produce surface vacancy-rich regions, Si samples were B deposited and annealed at various temperatures between 900 and 1010C. B diffusion retardation was observed in both implantation conditions after low temperature annealing, while B diffusion enhancement occurred in 50keV implanted samples after annealing at a high temperature. Choosing high-energy implantation to separate vacancies and interstitials could reduce the B diffusion significantly. Such suppression became more obvious with higher implant dose. Junctions less than 10nm deep (at 1014/cm3 by carrier concentration profiles) could be formed.

Defect Engineering - an Approach on Ultrashallow Junction in Silicon. L.Shao, X.Lu, X.Wang, I.Rusakova, J.Liu, W.K.Chu: Journal of Vacuum Science and Technology B, 2002, 20[1], 419-21