A technique to extract trap states at the oxide-Si interface and grain boundary was developed for polycrystalline Si thin-film transistors with large grains. From the capacitance-voltage characteristic, the oxide-Si interface traps could be extracted. Potential and carrier density were also extracted. From the potential, carrier density, and current-voltage characteristic, the grain boundary traps could be extracted by considering the potential barrier at the grain boundary. Since these trap states were sequentially extracted, any shape of energy distribution of the trap states could be extracted. The correctness of this extraction technique was confirmed by comparison with two-dimensional device simulation.

Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary for Polycrystalline Silicon Thin-Film Transistors. M.Kimura, R.Nozawa, S.Inoue, T.Shimoda, B.O.Lui, S.W.Tam, P.Migliorato: Japanese Journal of Applied Physics - 1, 2001, 40[9A], 5227-36