It was recalled that 2-dimensional location control of large Si grains by the so-called μ-Czochralski process, with excimer-laser crystallization, permitted the formation of thin-film transistors within a grain; single-grain Si thin-film transistors. Here, the effect was studied of remaining defects - within the location-controlled grains - upon the electrical performance of single-grain Si thin-film transistors. From electron back-scattering diffraction analysis, it was found that most of the defects within the location-controlled grains were a coincidence site lattice boundary of Σ3, followed by Σ9 and Σ27. If such a coincidence site lattice boundary were parallel to the current flow direction, the field effect mobility of the thin-film transistor was 597cm2/Vs. When the Σ9 boundary was perpendicular to the current flow, the mobility decreased to 360cm2/Vs; suggesting electrical activity in the Σ9 boundary.

Electrical Property of Coincidence Site Lattice Grain Boundary in Location-Controlled Si Island by Excimer-Laser Crystallization. R.Ishihara, M.He, V.Rana, Y.Hiroshima, S.Inoue, T.Shimoda, J.W.Metselaar, C.I.M.Beenakker: Thin Solid Films, 2005, 487[1-2], 97-101