New process integration routes to the fabrication of strained-Si nMOSFETs having thicker strained-Si grown on a relaxed Si0.8Ge0.2 virtual substrate were reported. For the same device parameters and process condition, a device with this advanced integration flow (sample B) starting epitaxial strained-Si layers after shallow trench isolation and well implantation was shown having a 70% enhancement in effective electron mobility compared to the Si control device. Devices with conventional process sequences (sample A) exhibited a larger leakage current and up to 50% device failure. The leakage mechanism in sample A due to misfit dislocation-induced leakage paths was clearly demonstrated from the photon emission microscopy (PEM) measurement. Improved characteristics in sample B indicated that devices with new process sequences exhibited controlled misfit dislocations in strained-Si layers and showed a greater flexibility for developing high-performance strained-Si CMOS.

Controlled Misfit Dislocation Technology in Strained Silicon MOSFETs. S.L.Wu, Y.P.Wang, S.J.Chang: Semiconductor Science and Technology, 2006, 21, 44-7