The generation of misfit dislocations and stacking faults was studied by transmission electron microscopy and preferential chemical etching in multilayer Si(001)/SiGe/SiGeC(10nm)/SiGe/Si heterostructures grown by CVD at 650C. Prior to growth of Si layer, the other part of heterostructure was annealed at 950C in the growth chamber to get relaxed buffer layers and strained Si layer free of extended defects. Here, SiGe alloys with a Ge content of 24at% and a C content of 0.5at% were used. Carbon in the strained SiGe matrix was found to promote high rates of strain relaxation through the nucleation of perfect dislocation loops close to the interface with Si substrate. For Si layer thickness >10nm, threading dislocations split in these layers under tensile strain to form stacking faults.

Formation of Extended Defects in SiGe/Si Heterostructures with SiGeC Intermediate Layers. V.I.Vdovin, T.A.Torack, L.Fei, V.Y.Reznik, M.G.Milvidskii, R.Falster: Physica Status Solidi C, 2007, 4[8], 3043-7