A SiGe-on-insulator (SGOI) structure with high Ge content and low density of dislocations was fabricated by a modified Ge condensation technique. The formation and elimination of stacking faults during condensation process were analyzed by transmission electron microscopy. A Si0.19Ge0.81OI substrate was fabricated utilizing two steps of oxidation and intermittent annealing. The time of oxidation or annealing at 900C was essential for the elimination of stacking faults in high Ge content SGOI substrate. The surface morphology of SGOI was investigated by atomic force microscopy and the defect density was evaluated from wet etching method. After the final condensation, the surface root-mean-square roughness (rms) of SiGe layer was kept below 1nm and the threading defect density was controlled around 104/cm2. The smooth surface and integrated lattice structure of SiGe layer indicated that the SGOI was suitable for hetero-epitaxial growth of strained Ge, GaAs and III–V compounds.

Fabrication of High Ge Content SiGe-on-Insulator with Low Dislocation Density by Modified Ge Condensation. X.Ma, W.Liu, C.Chen, X.Du, X.Liu, Z.Song, C.Lin: Applied Surface Science, 2009, 255[17], 7743-8