Polycrystalline Si layers with variable grain sizes were prepared by changing the crystallization temperature. Solar cells based upon these layers exhibited a performance which was independent of the grain size. Defect etching and electron beam induced current measurements revealed the presence of a high density of electrically active intragrain defects. They were therefore considered to be the reason for the grain size independent device performance. Besides dislocations and stacking faults, Σ3 boundaries were also electrically active as shown by combining electron back-scattered diffraction with electron beam induced current measurements. The electrical activity of the defects was probably triggered by impurity decoration. Plasma hydrogenation changed the electrical behaviour of the defects, as seen by photoluminescence, but the defects were not completely passivated as shown by electron beam induced current measurements. In order to reveal the origin of the defects, cross-sectional transmission electron microscopy measurements were done showing that the intragrain defects were already present in the AIC seed layer and get copied into the epitaxial layer during epitaxial growth. The same types of intragrain defects were found in layers made on different substrates (alumina ceramic, glass ceramic, and oxidized silicon wafer) from which it was concluded that intragrain defects were not related to the relatively rough alumina ceramic substrates often used in combination with high temperature epitaxy.

Intragrain Defects in Polycrystalline Silicon Layers Grown by Aluminum-Induced Crystallization and Epitaxy for Thin-Film Solar Cells. D.Van Gestel, I.Gordon, H.Bender, D.Saurel, J.Vanacken, G.Beaucarne, J.Poortmans: Journal of Applied Physics, 2009, 105[11], 114507